EEE434L VLSI Design Lab
Lab Manual
LAB MANUAL
Department of Electrical Engineering,
Comsats Institute of Information Technology, Abbottabad.
1
EEE434L VLSI Design Lab
Lab Manual
LAB 8
DESIGN, SIMULATION AND PERFORMANCE COMPARISON OF SUBMICRON PSEUDO STATIC AND TRUE SINGLE PHASE CLOCKED EDGE
TRIGGERED MEMORY + LOGIC UNITS USING DIFFERENT TOOLS
Objective
The objective of this experiment is to learn the Layout and Schematic Design of sub-micron
technology Finite State Machines (FSM) using Pseudo Static and True Single Phase Clocked
Edge Triggered Memory + Logic Units and to compare their performances with the help of their
simulations in SPICE tools.
Tutorial
Download the soft copy of the PSPICE/LTSPICE tutorials and the LTSPICE and PSPICE
software from your course portal. For further detailed information you may visit the following
web-pages:
[Link]
[Link]
[Link]
Problem Statement
Design a 0.25 Micron Technology Pseudo Static Edge Triggered Flip Flop and a True Single
Phase Clocked Edge Triggered Flip Flop in PSPICE and Microwind. Include Logic Circuits in
your Designs to make Finite State Machines (FSM). Compare the performance of the two
Circuits by simulating them and analyzing the results.
Block / Stick Layout Diagrams Finite State Machine
Department of Electrical Engineering,
Comsats Institute of Information Technology, Abbottabad.
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EEE434L VLSI Design Lab
Lab Manual
Lab Instructions
1. Create a directory and save it by your own name in E:\ Drive.
2. Open PSPICE Schematic Editor and save the appearing empty schematic with the name:
yourInitials_FSM in a sub-directory named FSMs within the directory you created in
the previous step.
3. Add the following components from the PSPICE library on your schematic scheet:
a. MbreakN (NMOS)
b. MbreakP (PMOS)
c. VDC (DC voltage source)
d. GndA (Analog Ground)
4. Click the MbreakN part to select it (becomes red) and change its model parameters to that
of 0.2 Micron Technology using the model command in the edit menu. Do the same for
MbreakP part.
5. Then double click the MbreakN and MbreakP parts respectively to change their variable
physical features.
6. Make the Schematic of Pseudo Static Edge Triggered D Flip Flop and save it by its
name.
7. Make the Schematic of a True Single Phase Clocked Edge Triggered D Flip Flop and
save it by its name.
8. Next make a two bit FSM by using two copies of your Pseudo Static Edge Triggered D
Flip Flop and adding a decoder circuit behind it.
9. Similarly use a two bit True Single Phase Clocked Edge Triggered D Flip Flop but
embed the decoder circuit in it to make it an FSM.
10. Simulate both the circuits and observe and compare their respective delays.
11. Make the layouts of these circuits in Microwind by utilizing the earlier circuits you have
been making in Microwind in your previous labs.
Lab Report
Department of Electrical Engineering,
Comsats Institute of Information Technology, Abbottabad.
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EEE434L VLSI Design Lab
Lab Manual
Add your lab report pages ahead of this page. The Lab report must include 5 main headings,
viz: Gate level Diagram of your FSM, PSPICE Schematics (with 4 subheadings one for each
circuit), PSPICE Simulations (with two subheadings 1 for each simulation), Microwind
Layouts (with two subheadings 1 for each layout) and Performance Comparison. Descriptions
must accompany your screenshots.
Analysis:
Read your input and output waveforms and verify that all parts of the output waveforms
correctly correspond to the respective parts of the input waveforms in accordance with their
logical operations; observe if there exist any slight differences from the ideal expected outputs
and draw your conclusions about the two different designs.
Department of Electrical Engineering,
Comsats Institute of Information Technology, Abbottabad.
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EEE434L VLSI Design Lab
Lab Manual
LAB-8 REPORT PART I
SIMULATING THE PERFORMANCE METRICS OF INVERTER AND MOSFETS
AND VIEWING THE RESULTS OF SECOND ORDER EFFECTS
Department of Electrical Engineering,
Comsats Institute of Information Technology, Abbottabad.
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EEE434L VLSI Design Lab
Lab Manual
Department of Electrical Engineering,
Comsats Institute of Information Technology, Abbottabad.
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