Digital Signal Processing Lab 3
Sir Syed University of Engineering & Technology
3. IntroductiontoDSKC6416&C6711ProcessorandRelatedSoftwares:
3.1 C6416TOverview:
ThepurposeofthislabistofamiliarizeyouwithDSPKitTMS320C6416TSimulink,RealTimeWorkshop
and Link for CCS and how they interact with Code Composer Studio (CCS). This lab involves building
relativelysimplesystemsusingSimulinkratherthanCCS.
3.1.1 DSPBoard:TexasInstrumentsTMS320C6416T(DSPStarterKit)DSK
The 6416 DSP Starter Kit (DSK) is an allinone evaluation platform for the TMS320C6416 Digital Signal
[Link]
interfacingtheDSPtocommondevicessuchasSDRAM,FlashandacodecaswellasaCodeComposer
Studio development tools. An onboard JTAG emulator allows debug from Code Composer Studio
throughyourPC'sUSBport.
Fig.3.1:BlockDiagramofTMS320C6416TBoard
The TMS320C6416T DSK comes with a full compliment of onboard devices that suit a wide variety of
[Link]:
ATexasInstrumentsTMS320C6416TDSPoperatingat1Gigahertz.
AnAIC23stereocodec
16MbytesofsynchronousDRAM
512KbytesofnonvolatileFlashmemory
4useraccessibleLEDsandDIPswitches
SoftwareboardconfigurationthroughregistersimplementedinCPLD
Digital Signal Processing Lab 3
Sir Syed University of Engineering & Technology
Configuredbootoptionsandclockinputselection
Standardexpansionconnectorsfordaughtercarduse
JTAGemulationthroughonboardJTAGemulatorwithUSBhostinterfaceorexternalemulator
Singlevoltagepowersupply(+5V)
SystemRequirementsforinstallingDSKcontents
500MBoffreeharddiskspace
MicrosoftWindows2000/XP
128MBofRAM
16bitcolordisplay
CDROMDrive
InstallDSKContentfromtheCDROM
Before you install the DSK software, please make sure you are using Administrator privileges and any
[Link].
1. [Link](seebelow)
[Link],[Link]
optionfromthemenu.
2. Install any components you need. To debug with the DSK you must have 1) a copy of Code
ComposerStudio,2)thetargetcontentpackageforyourboardand3)acopyoftheFlashBurnplug
[Link]
simplyinstallthetargetcontentpackages.
3. Theinstallationprocedurewillcreatetwoiconsonyourdesktop:
6416DSKCCStudiov3.1
6416DSKDiagnosticsUtilityv3.1
ConnecttheDSKtoYourPC
1. [Link]
modificationsconnectthroughaUSBhubforsafety.
2. Ifyouplantoconnectamicrophone,speaker,orexpansioncardthesemustbepluggedinproperly
beforeyouconnectpowertotheDSKboard.
3.Connecttheincluded5VpoweradapterbricktoyourACpowersourceusingtheACpowercord.
4.ApplypowertotheDSKbyconnectingthepowerbricktothe5VinputontheDSK.
5. When power is applied to the board the Power On Self Test (POST) will run. LEDs 03 will flash.
When the POST is complete all LEDs blink on and off then stay on. At this point your DSK is
functionalandyoucannowfinishtheUSBdriverinstall.
6. Make sure your DSK CDROM is installed in your CDROM drive. Now connect the DSK to your PC
[Link]"AddNewHardwareWizard"and
promptforthelocationoftheDSKdrivers.
7. Follow the instructions on the screens and let Windows find the USB driver files [Link] and
[Link].
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Digital Signal Processing Lab 3
Sir Syed University of Engineering & Technology
Fig.3.4:6416DSKCCStudiov3.1icon
DebugHintsandTroubleShooting
1. If installing on Windows XP and your PC is connected to the internet through a firewall the USB
[Link]
simplydisconnectyournetworkcableduringtheUSBhardwareinstall.
2. MakesurealloftheConfigurationSwitches(SW3)[Link]
for the factory default settings of little endian processor mode booting out of the onboard Flash
memory.
3. If you want to verify a successful USB driver install, open your device manager by right clicking on
the My Computer icon on your desktop and selecting Properties > HW > Device Manager. You
should see a new class SD USB Based Debug Tools and one Spectrum Digital TMS320C6416 DSK
installed.
4. [Link]
CodeComposeruntiltheLEDisoff.
3.1.2 DSPBoardComponents
DSPboardcomponentsandtheirspecificationsaregivenintablebelow:
Components Details
TMS320C6416TDSP 1GHzMHz,fixedpoint,1MbyteinternalRAM
CPLD Programmable"glue"logic
ExternalSDRAM 16Mbytes,64bitinterface
ExternalFlash 512Kbytes,8bitinterface
AIC23Codec Stereo,8KHz96KHzsamplerate,16to32bitsamples,mic,linein,
lineoutandspeakerjacks
4UserLEDs WritablethroughCPLD
4UserDIPSwitches ReadablethroughCPLD
8ConfigurationSwitches Selectspoweronconfigurationandbootmodes
Digital Signal Processing Lab 3
Sir Syed University of Engineering & Technology
DaughtercardExpansionInterface Allowsusertoenhancefunctionalitywithaddondaughtercards
HPIExpansionInterface AllowshighspeedcommunicationwithanotherDSP
EmbeddedJTAGEmulator ProvideshighspeedJTAG debug throughwidelyaccepted USBhost
interface
Table3.1:6416TDSKSpecifications
ConfigurationSwitches
The6416TDSKhas8configurationswitchesthatallowuserstocontroltheoperationalstateoftheDSP
whenitisreleasedfromreset.TheconfigurationswitchblockislabeledSW3ontheDSKboard,nextto
the reset switch. Configuration switch 1 controls the endianness of the DSP while switches 2 and 3
configure the boot mode that will be used when the DSP starts executing. Configuration switches 58
usedtoconfiguretheEMIFandDSPfrequencies.
[Link]
onboardFlashinlittleendianmode.
Table3.2:Configurationswitchsettings
ThefollowingtableshowstheswitchpositionsettingsfordesiredCPUandEMIFAfrequencies.
Digital Signal Processing Lab 3
Sir Syed University of Engineering & Technology
Table3.3:CPUandEMIFAfrequencyconfigurationswitchsettings
AIC23StereoCodec
TheDSKusesaTexasInstrumentsAIC23(part#TLV320AIC23)stereocodecforinputandoutputofaudio
signals. The codec samples analog signals on the microphone or line inputs and converts them into
[Link]
toconvertthesamplesbackintoanalogsignalsonthelineandheadphoneoutputssotheusercanhear
theoutput.
Fourindustrystandard3.5mmstereojackconnectorsareusedintheaudiointerface:
Onejackisforconnectingaudioinputfromamicrophone.
Onejackforconnectingstereoaudiolineinput.
Onejackforoutputtingstereoaudiolineoutput(unamplified).
Onejackforconnectingstereoaudiooutputtoaspeaker(amplified).
UserLEDs
The four user controllable LEDs allow for user feedback and display of simple status information. They
are controlled by writing to the CPLD USER_REG register. They can also be set or cleared through the
LEDModuleoftheBoardSupportLibrary.
Digital Signal Processing Lab 3
Sir Syed University of Engineering & Technology
StatusIndicators
[Link]+5Vsupplyand
will illuminate whenever the power is connected. The RESET LED illuminates when the RESET event
occurs.TheUSB_IN_USELEDisonwhenUSBemulationisusedandgoesoffwhenanexternalemulator
[Link].
DIPSwitches
The four DIP switches allow simple feedback from the user. The DIP switches can be read through the
CPLD USER_REG register. They can also be read using the DIP Switch module of the Board Support
Library.
PowerSupply
[Link]
the 1.4V DSP core voltage, 3.3V digital and 3.3V analog voltages. A voltage supervisor monitors the
internally generated voltage, and will hold the board in reset until the supplies is within operating
specifications and the reset button is released. If desired, JP1, JP2 and JP4 can be used as power test
pointsforthecore,I/Oandsystempowersupplies.
3.1.3 DSPBoardFeatures
[Link]
core is designed for extremely high performance. Beyond the DSP core, the 6416 integrates a number
of onchip resources that improve functionality and minimize hardware development complexity.
Featuresoftheprocessorinclude:
EMIFAExternalMemoryInterfaceA
[Link]
internal wait state generation and SDRAM control. The EMIF can interface to both synchronous and
asynchronousmemories.
EMIFBExternalMemoryInterfaceB
[Link]
[Link]
bandwidth.
McBSPsMultichannelbufferedserialports
EachMcBSPcanbeusedforhighspeedserialdatatransmissionwithexternaldevicesorreprogrammed
as general purpose I/Os. McBSP2 is used to transmit and receive audio data from the AIC23 stereo
codec.McBSP1isusedtocontrolthecodecthroughitsserialcontrolport.McBSP0isalwaysbroughtout
totheperipheralexpansionconnector.TheMISCregisterintheCPLDisusedtoselectwhetherMcBSP1
andMcBSP2areroutedtotheAIC23ortheexpansionconnectors.
Digital Signal Processing Lab 3
Sir Syed University of Engineering & Technology
1MbyteInternalMemory
Highspeedinternalmemoryformaximumperformance.
OnchipPLL
Generateprocessorclockratefromslowerexternalclockreference.
3Timers
Generate periodic timer events as a function of the processor clock. Used by DSP/BIOS to create time
slicesformultitasking.
EDMAController
EnhancedDMAcontrollerallowshighspeeddatatransferswithoutinterventionfromtheDSP.
Endianness
Endianness is a term that refers to the byte ordering of multibyte data types. Specifically, a system is
calledbigendianifbyte0containsthemostsignificantbyteofthedataorlittleendianifbyte0contains
the least significant byte. The 6416 supports both modes and the processor endianness can be
[Link]
andalloftheDSKspecificcodeexamplesaredistributedinlittleendianformat.
3.2C6711Hardware
DSPBoard:TexasInstrumentsTMS320C6711(DSPStarterKit)DSK
DSP: Fixedpoint and floatingpoint arithmetic, eight functional units (two multipliers and six
ALUs), 150 MHz clock (up to 900 MFLOPS), 32 generalpurpose registers of 32bit word
length,64K(+2x4K)bytes internalmemory,DMAcontroller(16channels),externalmemory
interface(32bitaddressspace),multichannelserialport,hostportinterface.
ExternalMemory:16MbytesSDRAMat100MHzand128KbytesflashprogrammableROM.
WaveformGenerator:SpecifyingWaveformParameterValues
Whileworkingwiththesignalgenerator,youwilloftenneedtoenteravalueforaparameterof
[Link],followtheseinstructions:
[Link]
can also specify which digit to modify by pressing the > or < button. The flashing digit
indicatestheonethatisincremented/decrementedifyouturntheknob.
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Digital Signal Processing Lab 3
Sir Syed University of Engineering & Technology
Tobuildaproject,chooseProject>[Link](re)compileallthe
filesoftheproject,linkthemtotheresulting*.outfile,andloaditintotheDSP'[Link]'s
alsopossibletodoanIncrementalBuildwhereonlythemodifiedfilesarecompiled.
To run a program, choose Debug>Run or press the F5 button. Remember that the program
mustbesuccessfullycompiled,linked,andloadedintotheDSP'[Link]
[Link].
For more convenience, we sometimes provide a WORKSPACE file. Using such a file opens the specified
[Link]*.wksfile,clickFile>Workspace>Open.
TroubleswithCCS>KnownBugs
CCS built and loaded the interruptbased program successfully but it does not run
properly.
RestarttheDSPprogram:Debug>Restart.
Thisproblemhappensveryoften,especiallywhenitisthefirstprogramafterstartingCCS.
Reallynothingworksanymore.
Close (or kill) CCS, powerdown and powerup the DSP board, and start CCS again. This problem
happens when a big amount of data is transmitted through the parallel connection (e.g. while
debugging).
QuickTestofDSK
[Link]>CheckDSK>Quick
[Link]
followingmessageisthendisplayed:
Switches:7
Revision:2
TargetisOK
ConfigurationParametersforC6000Hardware
[Link]
[Link],typesimulinktolaunchSimulink
[Link].
[Link],selectSimulation!ConfigurationParameters
[Link],chosetheRealTimeWorkshopcategory.
6. For Target Selection, choose the file ti [Link]. RealTime Workshop will automatically
changetheMakecommandandTemplatemakefileselections.
[Link],
unselectBlockreductionoptimizationandImplementlogicsignals....
Digital Signal Processing Lab 3
Sir Syed University of Engineering & Technology
8.ChoosetheTIC6000targetsel....SetCodegenerationtargettypetoC6711DSK.
[Link].
[Link],[Link].
11. In the Select tree, choose the Solver category. Ensure that Solver is set to Fixed type /
discrete.
Task:
Writeabriefreport(2to3pages)aboutyourlearning,observationandunderstandingofthislab.
