Snubber Circuits

A. Overview of Snubber Circuits

B. Diode Snubbers

C. Turn-off Snubbers

D. Overvoltage Snubbers

E. Turn-on Snubbers

F. Thyristor Snubbers

William P. Robbins
Professor
Dept. of Electrical Engineering
University of Minnesota
200 Union St. SE.
Minneapolis, MN 555455

Copyright 1997

Snubbers - 1
W.P. Robbins © 1997
 Function of Snubber Circuits

• Protect semiconductor devices by:

• Limiting device voltages during turn-off transients

• Limiting device currents during turn-on transients

di
• Limiting the rate-of-rise ( ) of currents through the
dt
semiconductor device at device turn-on

dv
• Limiting the rate-of-rise ( ) of voltages across the
dt
semiconductor device at device turn-off

• Shaping the switching trajectory of the device as it

turns on/off

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W.P. Robbins © 1997
 Types of Snubber Circuits

1. Unpolarized series R-C snubbers

• Used to protect diodes and thyristors

2. Polarized R-C snubbers

• Used as turn-off snubbers to shape the turn-on switching

trajectory of controlled switches.

• Used as overvoltage snubbers to clamp voltages applied to

controlled switches to safe values.

dv
• Limit during device turn-off
dt

3. Polarized L-R snubbers

• Used as turn-on snubbers to shapte the turn-off switching

trajectory of controlled switches.

di
• Limit during device turn-on
dt

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W.P. Robbins © 1997
 Need for Diode Snubber Circuit

+ Lσ • L σ = stray inductance
Rs
Io
• S w closes at t = 0
V D Cs
d f
• R s - Cs = snubber circuit

- Sw

di V
Df d
=
d t Lσ
Io
i (t) t
Df
I rr

v (t) t
Df V
d

d i Lσ • Diode voltage
Lσ
d t without snubber

di Lσ
• Diode breakdown if V d + Lσ > BVBD
dt

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W.P. Robbins © 1997
 Equivalent Circuits for Diode Snubber

Lσ

+ Rs
V Diode cathode
d
snap-off anode Cs
-

• Worst case assumption- diode

i Df t snaps off instantaneously at end
of diode recovery

• Simplified snubber - the capacitive snubber

Lσ
• Rs = 0
+
+ •v = -v
Cs Df
V v Cs
d Cs
-
-

d2vCs vCs Vd
• Governing equation - + =
dt 2 LσCs L σCs

• Boundary conditions - v Cs (0+) = 0 and i Lσ(0+) = I r r

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W.P. Robbins © 1997
 Performance of Capacitive Snubber

Cbase
• vCs (t) = Vd - V d cos(ωot) + Vd sin(ωot)
Cs

I r r 2
1
• ωo = ; C base = Lσ  
LσCs V
 d

 Cbase 
• Vcs,max = Vd 1 + 1 + 
 Cs 

V 3
Cs,max
Vd
2

0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
C base
Cs

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W.P. Robbins © 1997
 Effect of Adding Snubber Resistance

• Equivalent circuit with snubber resistance R s

Lσ

+ -
Rs
V v (t)
d Df
Cs
- +

d2vDf dvDf
• Governing equation LσCs + Rs Cs + vDf = -Vd
dt 2 dt

• Boundary conditions
dvDf (0+) I rr R s Vd I r r Rs2
vDf (0+) = - I r r R s and =- - +
dt Cs Lσ Lσ

• Solution for v Df (t)

Cbase
vDf (t) = - Vd - V d e- αt sin(ωa t - φ − ξ)
Cs

α2 1 Rs
ωa = ωo 1 - ; ωo = ; α=
ωo2 LσCs 2Lσ

Rb α α Vd Lσ
tan(φ) = - - ; tan(ξ) = ; R base = , C base =
ωa Lσ ωa ωa I rr (Vd/ I r r )2

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W.P. Robbins © 1997
 Performance of R-C Snubber

• At t = tm vDf (t) = Vmax

tan- 1 (ωa /α) φ - ξ

• tm = + ≥0
ωa ωa

Vmax
• =1+ 1 + C N- 1 - R N exp(-αt m)
Vd

Cs Rs
• CN = and RN =
Cbase R base

Ls I r r 2 Vd
• Cbase = and R base =
Vd2 I rr

R s,opt
C s = C base = 1.3
R
base
2

V max
V
d

Rs I rr

Vd
0
0 1 R s 2
R base

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W.P. Robbins © 1997
 Diode Snubber Design Nomogram

Wtot
2
3 L s I r r /2

WR
2
L s I r r /2

2
0

0 V max
for R = R
0 Vd s s,opt
0
00
00
0 00
0 00 0
00 0 0 0 0 00
1 R s,op

R base

0
0 1 2 3
C s / Cbase

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W.P. Robbins © 1997
 Need for Snubbers with Controlled Switches

L1 • L1 , L 2 , L 3 = stray inductances
L2
Io

V • L = L + L + L
d 1 2 3
i
sw +
S vsw
L3 w
-

di
L
dt

i
sw

L di
Io dt V Io
d

vsw

to t t t t5 t
3 4 6
1

idealized
i
sw switching
t t5 loci
6 • Overvoltage at
turn-off turn-off due to
to
stray inductance
t1
• Overcurrent at
turn-on
turn-on due to diode
reverse recovery

t
4 t3 vsw
Vd

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W.P. Robbins © 1997
 Turn-on Snubber for Controlled Switches

• Circuit configuration

Turn-off
D snubber
i f Io
+ DF

V
d Ds

S Rs
w i
- Cs
Cs

• Equivalent circuit during switch turn-off

• Assumptions

Io 1. No stray inductance.
Df
2. i s w (t) = Io(1 - t/t f i )

V
d 3. i s w (t) uneffected by
Io - i
sw snubber circuit.
i sw
Cs

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W.P. Robbins © 1997
 Turn-off Snubber Operation

• Capacitor voltage and current for 0 < t < t f i

I ot I ot 2
• i Cs (t) = and v Cs (t) =
tf i 2Cs t f i

I ot f i
• For Cs = Cs1 , v Cs = Vd at t = tf i yielding C s1 =
2Vd

• Circuit waveforms for varying values of C s

i i i
sw sw sw

Io

i i i
Df Df Df
t fi t t fi
fi
i
Cs

V
d

v
Cs

Cs < Cs1 Cs = Cs1 Cs > C

s

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W.P. Robbins © 1997
 Benefits of Snubber Resistance at Sw Turn-on

D Io Io • Ds shorts out R s during S w

f
turn-off.
Rs
V • During S w turn-on, D s
d
reverse-biased and C s
Sw Ds
discharges thru R s .
Cs

• Turn-on with R s = 0

t rr discharge
• Energy stored on Cs
of C s
dissipated in S w .
vsw
• Extra energy
V Io dissipation in S w
d
because of lengthened
i sw t ri t voltage fall time.
2
0 t ri + t rr

v
sw
• Turn-on with R s > 0 t rr

• Energy stored on Cs i I
D rr
dissipated in R s f

rather than in S w . Vd
Io
i sw Rs
• Voltage fall time kept
quite short. I rr

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W.P. Robbins © 1997
 Effect of Snubber Capacitance

• Switching trajectory

i sw

Io

Cs < Cs1 RBSOA

Cs = Cs1

Cs > Cs1

V vsw
d
• Energy dissipation

1
WR = dissipation in
total Wbase
W /
resistor
0.8
WT = dissipation in
switch S w
0.6

W / Wbase I ot f i
R Cs1 =
0.4
2Vd
WT / W base

0.2 Wtotal = WR + WT

Wbase = 0.5 VdI ot f i

0
0 0.2 0.4 0.6 0.8 1 1.2 1.4
C /C
s s1

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W.P. Robbins © 1997
 Turn-off Snubber Design Procedure

• Selection of Cs

• Minimize energy dissipation (W T) in BJT at turn-on

• Minimize WR + WT

• Keep switching locus within RBSOA

• Reasonable value is C s = Cs1

• Selection of R s

Vd
• Limit icap(0+) = < Ir r
Rs

• Usually designer specifies I r r < 0.2 Io so

Vd
= 0.2 Io
Rs

• Snubber recovery time (BJT in on-state)

• Capacitor voltage = V d exp(-t/R s Cs )

• Time for vCs to drop to 0.1Vd is 2.3 Rs Cs

• BJT must remain on for a time of 2.3 Rs Cs

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W.P. Robbins © 1997
 Overvoltage Snubber for Controlled Switches

• Circuit configuration - D ov, R ov, and C ov form overvoltage snubber

Lσ

+
D Io R
f ov
Vd

Sw Dov
- C ov

• Overvoltage snubber limits magnitude of voltage developed across

S w as it turns off.

• Switch S w waveforms without overvoltage snubber

• t f i = switch current fall time ; kV d = overvoltage on Sw

kV
d di LσIo
i • kV d = Lσ = Lσ
s dt tf i
w
Io V kV dt f i
d
• Lσ =
Io
v
s
w
o t
fi

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W.P. Robbins © 1997
 Operation of Overvoltage Snubber

• Dov,C ov provide alternate path for inductor current as S w turns off.

• Switch current can fall to zero much faster than L σ current.

• Df forced to be on (approximating a short ckt) by I o after S w is off.

• Equivalent circuit after turn-off of S w .

i
Lσ
Lσ π LσCov
+ • Dov on for 0 < t <
D R 2
ov ov
Vd
π LσCov
+
C ov v • t f i <<
- Cov 2
-
i • Equivalent circuit while
Lσ
inductor current decays to zero
+
L
σ + v Cov (0+) = Vd i Lσ(0+) = I o
V v
d C Cov
ov
- - i (t) = I o cos[
t
]
Lσ Lσ C ov

Discharge of Cov thru R ov

Charge-up of Cov from Lσ
with time constant R ov C
ov
∆V sw,max
i
Lσ

I Vd • Energy transfer from Lσ to Cov

o

Cov ( ∆V sw,max )2 Lσ ( I o )2
v =
s 2 2
w π Lσ C ov
0
4
.

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W.P. Robbins © 1997
 Overvoltage Snubber Design

Ls I o 2
• Cov =
(∆v sw,max )2

• Limit ∆v sw,max to 0.1Vd

kV d t fi
• Using Ls = in equation for Cov yields
Io

kV d t fi I o 2 100k t f i I o
• Cov = =
I o (0.1Vd )2 V d2

t fi I o
• Cov = 200 Cs1 where Cs1 = which is used
2Vd
in turn-off snubber

• Recovery time of C ov (2.3Rov Cov ) must be less

than off-time duration, toff , of the switch Sw.

t off
• R ov ≈
2.3 C ov

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W.P. Robbins © 1997
 Turn-on Snubber Circuit

• Circuit topology

+ +
D I D
f o f R
Ls
Ls I
o
Snubber
D
circuit Ls
R V
V Ls Ls d
d D
D f
Ls

Sw
- Sw -

di s w
• Circuit reduces V s w as switch S w turns on. Voltage drop Ls
dt
provides the voltage reduction.

• Switching trajectories with and without turn-on snubber.

i sw
Io
With Without
snubber snubber

di sw
Ls
dt
v
sw
V
d

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W.P. Robbins © 1997
 Turn-on Snubber Operating Waveforms

• Small values of snubber inductance (L s < Ls1 )

v I rr
s di s w
w • controlled by
dt
switch S w and
drive circuit.
V
d Io
Ls I o
• ∆vs w =
tr i

i
s
tr i trr
w

• Large values of snubber inductance (L s > Ls1 ).

v I rr
s di s w
reduced
w • limited by circuit
dt
Vd Io
V to <
d Ls tr i
Io
Vdt r i
i • Ls1 =
s Io
w
Ls Io
t ≈ > tr i + t r r
on
V
d
di s w
• I r r reduced when Ls > Ls1 because I r r proportional to
dt

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W.P. Robbins © 1997
 Turn-on Snubber Recovery at Switch Turn-off

+
D Io • Assume switch current fall time
f
t ri = 0.

• Inductor current must discharge

thru DLs - R Ls series segment.
R
V Ls Ls
d
D
Ls

- Sw

Io R
I o R Ls exp(-R Ls t/Ls ) Ls
• Switch waveforms
is
at turn-off with
w V turn-on snubber in
Io d circuit.

vs
t rv
w

• Overvoltage smaller if t f i smaller.

• Time of 2.3 Ls /R Ls required for inductor current to decay to 0.1 I o

• Off-time of switch must be > 2.3 L s /R Ls

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W.P. Robbins © 1997
 Turn-on Snubber Design Trade-offs

• Selection of inductor L s

• Larger L s decreases energy dissipation in switch at turn-on

• Ws w = WB (1 + I r r / I o)2 [1 - Ls /L s1 ]

• WB = VdI ot f i /2 and L s1 = Vdt f i / I o

• Ls > Ls1 Ws w = 0

• Larger L s increases energy dissipation in R Ls

• WR = WB Ls / L s1

• Ls > Ls1 reduces magnitude of reverse recovery current I r r

• Inductor must carry current I o when switch is on - makes

inductor expensive and hence turn-on snubber seldom used

• Selection of resistor R Ls

• Smaller values of R Ls reduce switch overvoltage I o R Ls at

turn-off

• Limiting overvoltage to 0.1V d yields R Ls = 0.1 Vd/ I o

• Larger values of R Ls shortens minimum switch off-time of

2.3 Ls /R Ls

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W.P. Robbins © 1997
 Thyristor Snubber Circuit

1 3 5
- van + L

A
- v bn + L

B i
d
- v cn + L

Cs
4 6 2
Rs

• van (t) = Vs sin(ωt), v bn(t) = Vs sin(ωt - 120°), vcn (t) = Vs sin(ωt - 240°)

• Phase-to-neutral waveforms

v
v bn
an

v LL= v v v t
bn an = ba 1

• vLL(t) = 3 Vs sin(ωt - 60°)

3
• Maximum rms line-to-line voltage V LL = V
2 s

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W.P. Robbins © 1997
 Equivalent Circuit for SCR Snubber Calculations

• Equivalent circuit after T1 reverse recovery

i
L
2 L P
+ T after
1 Cs
recovery
V ( t )
bc 1 i
T3 (on) T1 Rs
-
A

• Assumptions

• Trigger angle α = 90° so that vLL(t) = maximum = 2 VLL

• Reverse recovery time t r r << period of ac waveform so that

vLL(t) equals a constant value of v bc(ωt 1) = 2 VLL

• Worst case stray inductance L σ gives rise to reactance equal

to or less than 5% of line impedance.

Vs 2VLL VLL
• Line impedance = = =
2I a1 6I a1 3I a1
where I a1 = rms value of fundamental component of the
line current.

VLL
• ωLσ = 0.05
3I a1

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W.P. Robbins © 1997
 Component Values for Thyristor Snubber

• Use same design as for diode snubber but adapt the formulas to the
thyristor circuit notation

I r r 2
• Snubber capacitor C s = Cbase = Lσ  
V
 d

di Lσ
• From snubber equivalent circuit 2 L σ = 2 VLL
dt

di Lσ 2VLL 2VLL
• I rr = tr r = tr r = t rr = 25 ωI a1t r r
dt 2Lσ 0.05 V LL
2
3 I a1ω

• Vd = 2 VLL

0.05 V LL  2 5 ωI a1t r r  2 8.7 ωI a1t r r

• Cs = Cbase =   =
3 I a1ω  2VLL  VLL

Vd
• Snubber resistance R s = 1.3 Rbase = 1.3
I rr

2VLL 0.07 V LL
• R s = 1.3 =
25ωI a1t r r ωI a1t r r

• Energy dissipated per cycle in snubber resistance = W R

LσI r r 2 Cs Vd2
• WR = + = 18 ω I a1 VLL(tr r )2
2 2

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W.P. Robbins © 1997