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ISRO Exam Questions and Answers

The document appears to be a list of questions from an ISRO paper from 2008. It includes questions about digital logic circuits, computer architecture, memory types, signals and systems, analog circuits, and more. The questions are numbered 1 through 35 and cover topics like D flip-flops, filters, processor architecture, memory write times, probability, Laplace transforms, op-amps, sampling, and parity generators. An engineering administrator named Mr. Varuna V. B.E. is credited at the top as the source.

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0% found this document useful (0 votes)
110 views3 pages

ISRO Exam Questions and Answers

The document appears to be a list of questions from an ISRO paper from 2008. It includes questions about digital logic circuits, computer architecture, memory types, signals and systems, analog circuits, and more. The questions are numbered 1 through 35 and cover topics like D flip-flops, filters, processor architecture, memory write times, probability, Laplace transforms, op-amps, sampling, and parity generators. An engineering administrator named Mr. Varuna V. B.E. is credited at the top as the source.

Uploaded by

VivekSonker
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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www.collegebudies.blogspot.com Administrator Mr. VARUNA.V B.

ISRO PAPER ON 10TH AUGUST,2008


1) Moore model of DFF? 2) Which of the following filter has steep roll-off characteristics? (A) Butterworth filter (B) Chebyshev filter (C) Bessel filter (D)-ans: B 3)The architecture of DSP processor--------(A) Havard (B) Von neumann (C)...(D).. ans: A 4)If the input frequency to a 6 stage ripple counter is 1000MHz then output frequency at 6th stage_______ 5)Minimum number of 2 input NAND gates required to realise the fn. AB'+CD'+EF' ans: 6 6)What will exit() fn. in C will do? 7) go to command in C will cause the program to jump to---ans: Label 8)VSWR is given then asked to find out reflection coefficient 9)The relation between power in FM signal and modulation index-------10)If two signals are AM modulated with modulation indices of 0.3 and 0.4 what will be the modulation index of combined signal? ans: Calculate using 1/M=(1/m1)+(1/m2) 11)If n stage pipelining is used in a processor, then what will be the speed improvement over non pipelined processor? (A) same (B) n (C) n! (D) 2n 12) One circuit is given (That was a Voltage Doubler using op-amp) and asked to Identify that... 13) Which one of the following memory has fastest write time? (A) Flash (B) EEPROM (C) EPROM (D) None of these

14) In EEPROM data is stored in____ (A) Cross coupled Latch (B) Capacitor (C) floating gate transistor (D)-15) Which technology is faster? (A) Bipolar (B) MOS (C) CMOS (D) .. 16)Memory access time, cache access time , hit ratio are given, Asked to find out Average memory access time 17) If the probability of getting a job for A is 1/3 and the probability of getting a job for B is 1/4 then the probability of getting a job for A or B will be____? 18)One transfer fn As4 + Bs3 + Cs2 +D=0 (I don't remember the values of A,B,C,D ) is given, Asked to find out whether the system is____ (A) Stable (B) Unstable (C) Marginally Stable 19) For implementing D flip flop using RS flip flop, the extra component needed is____ (A) AND gate (B) OR gate (C) NOT gate (D) NOR gate 20)The output of an 8 bit DAC is 1Volt when the input is 00110010, then the full scale output of the same DAC will be____ ans: 5.1 V (Hint: 1/50*255) 21)Fastest ADC is___ (A) SAR (B) sigma- delta (C) flash (D)... 22)The operating point of Class-B amplifier will be at_____ (A) exactly at cut-off region (B) inside saturation region (C) inside cut-off region (D) middle of active region 23)For an N bit ADC , the number of comparators needed___ (A) N (B) 2N (C) 2N -1 (D) 2N-1 24)De-emphasis circuit is used for_______ ans: Attenuating high frequency components 25)The laplace transform of e-2t _____ Ans: 1/(s+2) 26)The magnitude of 1+cos x+j sin x____ Ans: 2 cos (x/2) 27) A circuit is given in which the capacitor (1uF) is initially charged to 12V , At t = 0, one switch is closed so that another capacitor of capacity 1.5uF comes in parallel with the first capacitor, then in steady state what will be the voltage across them? ( Visualize the circuit , as I can not draw the circuit since the editor is not supporting it)

28)Alpha of a transistor=0.99, Ico=1uA, Ie=1 mA, Ic=? 29)If the input given to an inductor is delta(t) (ie: =1 when t=0 and ,=0 otherwise) then the current will be___ (A) infinity (B) -infinity (C) 1 (D) 0 30) For implementing Band pass filter using High pass filter (Cutt off freq=Fh) and Low pass filter (cutt off freq= Fl)_____ (A)Fh=Fl (B) Fh>Fl (C) Fh<F1 (D).. Ans: Fh<Fl 31)In the Enhancement type MOSFET the gate to source voltage Vs drain current characteristics will be____ Ans: Drain current Increases as Vgs increases in active region 32)In a johnson counter, How many state have to be changed to increment the count from 0100 to 0111? 33)Odd parity generator is____ Ans: XNOR gate 34)A circuit using op-amp was given, the question was to calculate output offset voltage___ Ans: Vo(off)=Vin(off)*(1+Rf/R1) 35)Antialiasing filter is_____ (A) Digital filter (B) Analog filter (C) Can be Analog or digital (D) RC filter

www.collegebudies.blogspot.com Administrator Mr. VARUNA.V B.E

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