FPGA Programming using Verilog HDL Language
Conducted by:
BHUBANESWAR INSTITUTE OF TECHNOLOGY
Infovalley, Harapur, Bhubaneswar, Orissa - 752054, India Ph - +91-674-2113498, Fax - +91-674-2113497, Email:
[email protected] Website: www.bit.edu.in
Course Objective
Create and implement designs by using the ISE software design
environment and Basys-2 Spartan3E FPGA board. RTL Verilog code for synthesis
Verilog for Description Verilog for Synthesis
Verilog Modeling for Combinational Circuits Verilog Modeling for Sequential Circuits
Creating Finite State Machine (FSM) by using Verilog Verilog test fixtures for simulation Introduction to FPGA Project Work
PHASE-I
AGENDA:
DAY 1 (3rd Aug, 2011)
Introduction to VLSI and its importance Getting Started with ISE 10.1 and Basys-2 Spartan 3E Kit Lab work
Introduction to VLSI and its importance
VLSI stands for "Very Large Scale Integration". This is the field which involves packing more and more logic devices into smaller and smaller areas. VLSI circuits are everywhere ... your computer, your car, your brand new state-of-the-art digital camera, the cellphones...
Introduction to VLSI and its importance
Moores Law:
Gordon Moore: co-founder of Intel. Predicted that number of transistors per chip would grow exponentially (double every 18 months).
Introduction to VLSI and its importance
IC and number of logic gates:
SSI: Small-scale Integration, Gates< 10 MSl: Medium-scale Integration, 10<Gates< 1000 LSl: Large-scale Integration, Gates> 1000 VLSI: Very Large-scale Integration, Gates>100000
Introduction to VLSI and its importance
Why VLSI?
Integration improves the design: higher speed Lower power Physically smaller Integration reduces manufacturing cost higher reliability more functionality
Getting Started with ISE 10.1 and Basys-2 Spartan 3E Kit
Starting the ISE Software:
To start ISE, double-click the desktop icon
or Start All Programs Xilinx ISE Design Suite 10.1ISE Project Navigator
Create a new project:
Select File > New Project... The New Project Wizard appears. Type tutorial (any Project name) in the Project Name field. Enter or browse to a location (directory path) for the new project. A tutorial subdirectory is created automatically. Verify that HDL is selected from the Top-Level Source Type list. Click Next to move to the device properties page.
Getting Started with ISE 10.1 and Basys-2 Spartan 3E Kit
Device Properties:
Getting Started with ISE 10.1 and Basys-2 Spartan 3E Kit
Create an HDL source:
Click New Source in the New Project dialog box. Select Verilog Module as the source type in the New Source dialog box. Type in the file name counter. Verify that the Add to Project checkbox is selected. Click Next. Declare the ports for the counter design by filling in the port information as shown below:
