nclair FOR SERVICE MANUALS CONTACT: MAURITRON TECHNICAL SERVICES [Link] TEL; 01844 - 351694 Service ManualQL SERVICE MANUAL List of Contents Keyboard Matrix Interconnections QL Block Diagram QL Circuit Diagram (Issue 5) QL Circuit Diagram (Issue 6) Motor Location Jig Keyboard Format Head Chassis Issue 5 Board - Component Side Modification Issue 5 Board ~ Soluer Side Modification Issue 6 Board - Solder Side Modification Microdrive Signals (100 kHz WRITE) Microdrive Signals (100 kHz READ) Microdrive Signals (100 kHz FORMAT READ) ULA 26007 - Internal Circuit Printed Circuit Board (Issue 5) Component Layout Printed Circuit Board (Issue 6) Component Layout Prepared by THORN (EMI) DATATECH LTD "— for SINCLAIR RESEARCH LTD € Sinclair Research Ltd. SECTION 1 SYSTEM DESCRIPTION SECTION 2 DISASSEMBLY /ASSEMBLY SECTION 3 SYSTEM TEST SECTION 4 FAULT DIAGNOSIS AND REPAIR Appendix & known Bugs and their Remedies Appendix B User Hints Appendix C Mandatory Modifications Appendix 0 Microdrive Fault Finding SECTION 5 PARTS LISTS [List of lustrations ———_—__—__ RS 232 Link OcTOBER 1985 SERVICE MANUAL Q 1 () X=1204Manual Title: MANUAL ISSUE QL SERVICE MANUAL HISTORY SHEET CIRCUIT/LAYOUT DIAGRAMS: REMARKS: JANUARY 1985 JUNE 1985 . Minor changes made to pages 1.5, 3.6, 4.1, 4.3, 4.4, 4.15, 4.17, and'5.7. OcToBeR 1985 ‘Appendices A,B,C and D added to Section 4. FOR SERVICE MANUALS CONTACT: MAURITRON TECHNICAL SERVICES [Link] TEL: 01844 - 351694 FAX: 01844 - 352554,SECTION 1 SYSTEM DESCRIPTION Sub-Section LIST OF CONTENTS Page No. Introduction Architecture NC 68008 CPU Intel 049 Intelligent Peripheral Controller (1PC) Memory Organisation Peripheral Control (Zx8301, Zx8302 and 1C28) Nicrodrive Power Supplies Test. Fig No. S232 Link a Keyboard Matrix Interconnections 1 QL Block Diagram a QL Circuit Diagram (Issue 5) a QL Circuit Diagram (Issue 6) 1 Le a 1.2 INTRODUCTION The QL computer can be regarded in hardware terms as a combination of an exhanced Spectrum microcomputer, an Interface 1, an Interface 2 and two Nicrodrives within the same case. In practice the resemblance to the Spectrum is small. since the QL requires two microprocessors to accommodate powerful new software and is provided with 128& bytes of inbuilt DRAM. ‘A block diagram of the Sinclair QL is given in Figure 1.3. Two main versions of the Ql are in circulation. A certain number of boards to build standards up to Issue 5 were issued in either ROM or EPROM versions with another ROM mounted pickaback in IC33 position. The second, volume production, version of the board to build standard Issue 6, and subsequent, features 48k of on-board ROM realised in two memory devices. In the following description the two versions are referred to as the pre-Issue 6 and the post-Issue 6 versions. The main differences between the two versions, as far as the circuit description is concerned, are that IC17 and IC27 have been deleted and IC38 added in the post-Issue 6 version, a21 2.2 2.3 3. 3.1 3.2 3.3 ARCHITECTURE The architecture of the QL shown in Figure 1.3 incorporates much that is typical of microcomputer systems, but certain innovations make it atypical. Two microprocessors, an Intel 8049 and a Motorola 68008 are used, and the availability of 128 of DRAM plus a minimum of 200k on the two microdrives provides unusual storage facilities. The 8049 is designated the Intelligent Peripheral Controller (IPC) and the 68008 is the CPU. Two additional semi-custum ICs ZX8301 and 748302 cont cot defined areas of the system, under the supervision of the CPU. The microcomputer electronics are housed on a single printed circuit board which also houses a regulated power supply fed from an external Power unit. The keyboard forms part of the upper case assembly and is Connected to the [Link] via J11 and J12, The microdrive headboards and microdrive chassis, including the microdrives and the motors, form two complete sub-assemblies which plug in to the main [Link]. To the rear and side of the case are plug assemblies which accommodate the following: (a) main expansion connector, J1 (b) ROM cartridge, u2 (c) joystick, 03, 04 (d) R5232, u5, ¥6 (e) extra microdrives, EC1 Mc 68008 CPU The Motorola MC 68008 is a 32-bit microprocessor with an 8-bit data bus and is responsible for the overall timing and control of the QL. The firmware, which is outside the scope of this manual, resides in either @ ROM or an EPROK depending on the version. The 68008 has an external clock, generated by the Zx8301 and has the usual bus input/output arrangement, viz. data bus, address bus and control bus. Tt operates semi-synchronousiy in this configuration. Data Bus. 00-07 forms an 8-bit bi-directional data bus with active high, tri-state outputs. It is used for data exchanges with the memory, with the 7X8302 and 7X8301 and with the peripherals. Address Bus. Twenty bits AO-A19 are available for select and address Purposes. AQ-A15 form a 15-bit address bus with active high. The address bus provides the address for memory (up to 128k bytes) data exchanges and for data-exchanges with the QL and micradrive. Three bits A, Al and AS are used for this latter purpose. Bits AI6-A19 are used for device selection. 123.4 3.5 3.6 3.7 3.8 3.9 3.1 Control Bus. The control bus is a collection of individual signals which supervise the flow of data on the address and data busses. The block diagram shows most of these signals but reference to the circuit diagram shows other control signals available at the expansion port. Control lines are summarised below. Interrupt Control (IPLP/2,IPL1). These inputs indicate the encoded priority level of the device requesting an interrupt, and are fed by 1C24 (pins 23,24) and IC23 (pin 26). A satisfactory interrupt condition must exist for two successive clocks before triggering an internal interrupt request. An interrupt acknowledge sequence is indicated by the function codes, FCO and FC1. In this configuration FCO and FC1 are NANDed together at IC27,6 and the output routed to the valid peripheral address (VPA) input to the CPU. This input indicates that the processor should use automatic vectoring for an interrupt. The IPL signals and VPA may also be input from an external device via Ji, the main expansion connector. AI6 and Al7. These two address bits select ZX8301 and are decoded by it to assert the relevant CASD and CASI signal and ROMOEH and PCENL for the Zx8302 chip enable. For this purpose their states are either Tow and high, or high and Tow respectively. When ROM is being addressed both are in the low state. CLK Input. The CLK input denoted CLKCPU is the 7.5 MHz system clock from Zk8301. It is also fed to IC23 and IC24 and to the expansion port connector, Asynchronous data transfers are handled using the following control signals; DTACK, R/W, DS and AS. These signals are explained in the following paragraphs. DTACK (Data Transfer Acknowledge). This input indicates that the data transfer is completed, and is sent by the Zx8301 or through the expansion connector. "ithen the processor recognises DTACK during a read cycle, data is latched and the bus cycle is terminated. When ‘DTACK is recognised during a write cycle, the bus cycle is terminated. R/H. This tri-state signal defines the data bus transfer as a read or write cycle. The R/W signal also works in conjunction with the data strobe as explained in the following paragraph. DS (Data Strobe). This tri-state signal controls the flow of data on the data bus as shown in the table below. When the R/W linc is high, ‘the processor reads from the data bus as indicated. When the R/W line is low the processor writes to the data bus as shown. 1a3.16 a 1 - No valid data a 1 Valid Data Bits 0-7 (Read Cycle) 0 0 Vali¢ Data Bits 0-7 (Write Cycle) If the CPU is addressing an external device with one of address bits AI8 and ALS sot, emitter follower TR@ is switched on by the signal KILLH from [C38 This sets the DSNCL (Data Strobe Master Chip - Active Low}; the ‘Master Chip’ is the ZX8301) line permanently high thus disabling IC23 and 1C22. The local DS signal is still enabled to v1, the expansion port, to contro? R/W operations from an external device. In the pre-Issue 6 version TR& is switched from ICI. AS (Address Strobe). This tri-state signal indicates that there is a valid address on the address bus. Four other groups of control signals are used by the CPU. These four groups are routed to Jl only and are associated with Bus Arbitration Control, Periphera! Control, Processor Status and System Control in respect of external devices. Bus Arbitration Control. An explanation of this function is included for information only. It is not used by the QL but could be used by peripherals. The 68008 contains a simple 2-wire arbitration circuit designed to work with daisy-chained networks, priority encoded networks, or a combination of these techniques. This circuit fs used in determining which device will be the bus master device. The BR (8us Request) input is wire ORed with all other devices that could be bus masters. This device indicates to the processor that sone other device desires to become the bus master. Bus requests may be used at any time in a cycle or even if no cycle is being perfnrmed. The BC (Bus Grant) output signal indicates to all other potential bus master devices that the processor will release bus control at the end of the current bus cycle. N6B00-compat ible Peripheral Control is exercised through the VPA and E output lines. WPA is derived from two processor status signals FCI and FCO as described above though this is only used for auto vectoring. £ (Enable) is the standard enable signal common to all M6800 type peripheral devices. The period for this output is 10 Mc68008 clock periods (six clocks Tow, four clocks high). Processor Status (FCO, FC1 and FC2) are function code outputs which indicate the state (user or supervisor) and the cycle type currently being executed, as shown in the table below. The information indicated by the function code outputs is valid whenever address strobe (RS) is active. 143.18 3.19 ad 4.2 a4 FunctTon Code Output FC2 FCL FCO Octane LOW LOW LOW (Undefined, Reserved) LOW LOW HIGH User Data LOW HIGH LOW User Program Lox HIGH HIGH (Undefined, Reserved) HIGH LOW LOW (Undefined, Reserved) HIGH LOW HIGH Supervisor Data HIGH HIGH LOW Supervisor Program HIGH HIGH HIGH Interrupt Acknowledge System Control inputs are used to either reset or halt the processor and to indicate to the processor that bus errors have occurred. There are three system control signals, BERR, HALT and RESET. BERR (Bus Error). Not used on the Ql. RESET and HALT. The bidirectional RESET signal line acts to reset (start a system initialisation sequence) the processor in response to an external RESET signal. An internally generated reset (result of a reset instruction) causes all external devices to be reset and the internal state of the processor is not affected. A total system reset racessor and external devices) is the result of external HALT and RESET signals applied at the same time. WALT and RESET are tied together on the QL. INTEL 8049 INTELLIGENT PERIPHERAL CONTROLLER (IPC) The 8049, IC24, is a totally self-sufficient 8-bit single chip microcomputer containing 2 k bytes of program memory and 128 bytes of RAM. It is clocked internally at 11 MHz from crystal x4. In this application the function of the 8049 is to: {a) receive RS232 interface signals, {b) monitor the keyboard, } control the loudspeaker, } control the joystick. The IPC utilises a data bus, two 8-bit I/O ports and some control lines to control these functions. Data Bus. 080-087 constitutes an 8-bit bi-directional data bus with active high tri-state input/outputs. It is used only as input for scanning the keyboard and joysticks. Control Bus. Control is exercised by a number of discrete signals which organise Lhe direction and flow of data between the 6049 and the 2x8302, and also communicate with, and monitor, other areas of the QL. 1.545 4.6 47 4.8 4.9 Control Lines. The role of each control Tine is as follows: (a) Tl. Timer/Counter Input, 4 times the baud rate set by the user, controlled by a 2X8302 register. (b) WR. Output strobe, active low, used as a read or write strobe to enable keyboard, joystick or RS232 data to 1C23 over the P27 link line. {c) P10-P17. Output lines used to scan the keyboard and joysticks in conjunction with 089-087. (4) P26, Mot used on QL. (e) P21. Loudspeaker output. (f) P27, Serial link transmitting data to C23. (9) P24,P25. RS232 handshake lines. (h) RESET. Input from 1623 used to initialise the 8049, (i) CLXCPLL. Clock input from Zx8301. (k) P23, P22 (1PLI,IPL2). Interrupt request lines to 68008 CPU. (m) THT, P20. Interrupt input. THT initiates an interrupt on reception of RS232 first transition. P20 is used té read the data on the R232 receive lines. RS232 Link. IC24 is responsible for the receive side of the RS232 serial data link only, and IC23 the transmit side. Since the RS232 link is best understood as an entity both aspects are discussed here. JS and J6 are two RS232 connectors. J6 is connected so that the device connected to it may act as the Data Terminal Equipment (DTE) which originates the Data Terminal Ready (NTR) signal. JS connects to the Data Conmunications Equipment (DCE) i.e. the Tocal QL assumes DTE status. Figure 1.1 illustrates this schematically. The RS232 interface uses an ll-bit ASCII data frame, viz. one start bit, eight data bits and two stop bits comprise one character. Two stop bits are always sent but the interface receives compatibly with one except at 9600 baud, where one and a half stop bits are required. Data is transmitted asynchronously in the full duplex mode. Consider the QL as the DTE. Both DTE and DCE are switched on and have their DTR signals asserted. CTS and OTR (Clear to Send, Data Terminal Ready) do not form a handshake pair but are similar signals going in opposite directions, Serial data is transmitted by 1C23 via driver 1€25/6 and received by line receiver IC26/11. From IC26/11 data is fed to NAND gate IC27/9, pin 10 of which is set to the high state by the program, and input to IC24 pins 6 and 21 via 1C27/11. 1.6FOR SERVICE MANUALS a a CONTACT: MAURITRON TECHNICAL SERVICES www. [Link] TEL: 01844. 951694 FAX: 01844 - 352554 FIGURE 1.1 RS232 LINK 4.10 On receipt of a start bit, IC24 is interrupted, and a subroutine clocks in the data bits, synchronised by the baud rate generator. The data, up to about 20 bytes per RS232 channel, fs tnen buffered in Ic24. At the same time, IC24 receives commands (and sends reports) via the serial link with [C18 which fs controlled by 123. When IC24 receives a cormand from IC18 to empty one of its buffers, it does so, down the serial link via IC23. 4,11 With the QL acting as the DCE data and control is managed in a similar way utilising different 1¢25 and IC26 receivers/drivers. 4.12 Keyboard Monitor. Under program control the 8049 systematically scans the keyboard, recording which keys have been pressed. Figure 1.2 shows the way the keyboard is connected. It consists of an 8 x 8 matrix with one key, the shift key, connected to three input lines. The intersection of each row and column is bridged by a normally open contact. Pressing the key closes this switch. The row ‘outputs’ and column 'inputs' are shown connected to separate connectors J1l and 912, one to the port 1 outputs of C24 and the other to the data bus inputs. Pull-down resistors R17 tu R24 ensure Lhat when none of the key-switches are closed row inputs K80% to KBO7 remain low. 1.74.13 4.14 4.15 4.16 5.1 5.11 5.1.2 5.1.3 5.2 5.2.1 When the keyboard scanning routines are entered (KBOn is output, KBIn is input) the 8049 performs successive 1/0 read cycles setting each KB09 to KBO7 line low in turn, At the same time the I/0 port 1 inputs are scanned. There are a total of eleven diodes used for isolation, Eight of these, D4 through Dll are isolation diodes which isolate the different rows from each other. Three of the diodes D1 to 03 provide individual isolation for the Shift Control and Alt keys so that these keys have diodes in series with them in both directions of the matrix. They are thus fully isolated. Voystick. Connectors J3 and J4 provide a FIRE input and the four switch inputs for each of two joysticks. One line is not used. J3 and U4 are connected in parallel with keyboard connectors J1l and J12. Loudspeaker Operation. During the execution of a BEEP instruction the IPC writes to port 2, P21 thus switching on transistor TR1 and driving the loudspeaker. The loudspeaker is damped by resistor R104 (post~ Issue 6 onty). MEMORY ORGANISATION Introduction The pre-Issue 6 version was supplied in both EPROM and ROM forms with on-board straps enabling the selection of ROM. Both versions have 48 of ROM and in both versions there are 128 bytes of RAM memory. Figure 1.3 shows how the menory is organised. The lower 48k bytes (addresses 0000-BFFF) are implemented in one 32k and one 16k byte ROM, IC33 and IC34 respectively which hold the monitor program. This program 1s a complex 68008 machine, code program divided broadly into two parts; the operating system and the BASIC interpreter. Details of the program content are outside the scope of this manual. 32k bytes of memory (addresses CO00-FFFF) have been left assigned to the ROM cartridge while 128& bytes of RAN (addresses 20000-3FFFF) are implemented on Sixteen 64k-bit dynamic RAMS, IC1-IC16, Read/Write Operations The following description should be read in conjunction with the circuit diagrams given in Figures 1.4 (pre-Issue 6) and 1.5 (post Issue 6). Read Only Memory. The CPU addresses the ROM/EPROM directly during memory read cycles using the address bus AL5-AQ. In the pre-Issue 6 version, depending on the ROM/EPROM fit, the enabling and selection pins on’ 1033 and 1034 are set by link selection on ICI7. Links JUI to U6 via gate circuit ICI7 are used to provide the correct signals; the link fit requirements for different ROM/EPROM versions is listed on the circuit diagram, Figure 1.4. In the post-Issue 6 version the ROMs are enabled directly by the signal ROMOEH from ZX8301. 1.85.2.2 5.2.3 5.2.4 5.2.5 5.2.6 6.1 RAM Memory (ICI-IC16). The sixteen RAM ICs making up the 16k x 64 bit RAM memory are organised as two matrices of 256 rows x 256 columns ie. IC1-8 and 1C9-16. Thus, separate 8-bit row and column addresses are required to access any one of the 64k locations in each section. These addresses are supplied by the CPU (68008) on address bus AP to AlS via tri-state address multiplexers IC19 and IC20, These multiplexers decode from sixteen to eight lines and outputs enabled by ‘the row address select line (RASL) signal from the ZX8301. The valid data address (VDA) selects the address from the CPU (via mulLiplexers 1C19,1C20) or from the ZX6301, ROWL from the ZX€301 selects the row/column address. The R/W signal from the CPU informs the ZX8301 to expect either a read or a write cycle. For a write cycle the ZX8301 enables the write enable (WEL) line to the memory. The eight bits each of column and row address are routed to both 64k sections of the RAM but the signals ‘column address select. 0° (CASOL) and ‘column address select 1' (CASIL) from the 2X8301 ensure that only the required half of the memory is active. Address bits Al6 and Al? from the CPU are decoded by the 2X8301 to enable the relevant CAS signal. The row address select line (RASL) signal from the ZX8301 is enabled during all read and write cycles from RAM. The 2X8301 has priority when accessing memory since it must access the memory mapped display area in the RAM at set intervals in order to build up the video for the TV display. When the ZX8301 requires to access memory, it asserts the VDA signal to CPU address multiplexers 1C19, IC20 and addresses RAM directly via its own address bus on pins 13,17, 18,20, 22,24, 27 and 28, Isolation between the two data busses D9-D7 and 0BP-DB7_ is accomplished using bus transceiver IC21. During 2X8301 memory cycles IC21 is disabled by negating the signal OEL from Hard Array Logic (HAL) C38. This signal is controlled by ZX8301 signal TXOEL. In the pre-{ssue 6 version, which does not incorporate the HAL, TXOEL is fed directly to IC2l. Refresh for the DRAM memory is accomplished during normal read cycles i.e. most rows are refreshed each time the ZX8301 accesses the memory mapped display area during picture compilation, the remaining rows are refreshed as a result of other read cycles also known to occur at regular intervals within the refresh period. PERIPHERAL CONTROL (ZX8301, 2X8302, IC38 and IC28) 2X8301, C22, The ZX8301 carries out the following functions: TV picture generation master clock generation system address decode DRAM refresh control of the bus transceiver. (a (b) (c ‘s 196.1L 6.1.2 6.1.3 6.14 6.1.5 6.1.6 6.1.7 6.2 The TV picture generation section of IC22 operates in conjunction with the memory mapped picture display area to produce five colour TV signals suitable for driving @ colour monitor. These signals, red, green and blue (RGB), CSYNCL (composite sync) and VSYNCH (vertical Sync) are routed to connector J7. The RGR and CSYNCL signals are also input to IC28 which produces composite PAL to drive a domestic TV receiver. The same signals are mixed in transistor TR9 to produce a composite video signal to drive a standard monochrome monitor. VSYHICH is also routed to 1C23 where it is used to provide an interrupt al the frame rate. This is used to give a time reference to the job scheduling supervisor in the operating system. Using the 15 MHz crystal clock, Xl, IC22 derives Tine and field timing compatible with the external receiver. Video is derived by accessing the memory mapped display area in the RAM in a set sequence at set times throughout the picture frame. The addresses are necessarily independent of the CPU and appear on IC22 address lines DAP through DA7. The net result is the five video signals output from [C22 on pins 32,31,30,12 and 11. The RGB signals are fed to level-setting resistor divider network R48- R53 and a.c. coupled to RGB-to-PAL converter IC28 on pins 3,4 and 5. The composite sync signal CSYNC is input on pin 2. External components of the circuit provide a number of clamp circuits; the luminance and chrominance signals are fed out, filtered and fed’ back ins the chrominance 4.43 crystal oscillator is connected; and a CR Jead/lag network introduces a 90°phase shift. The crystal has a very high tolerance and does not need trimming. The composite PAL signal is output on pin 9, divided down and applied to an encapsulated UHF modulator M1. Master clock is divided by two in IC22 from the externally connected 15 Miz crystal X1 and distributed via output pin 7 to various destinations on the board, and to Jl the main expansion connector. The system address decode signal PCENL, routed to peripheral controller 2X8302 pin 10, is derived differently on the two board versions. On the pre-Issue 6 board it is output from 2X8301 pin 39 and is derived from a combination of one of the decodes from address Vines Al6 and A17, and Al4 (via DA6). In the post-Issue 6 version ft is output from HAL pin 17 and is derived in a similar way from a decode of address lines Al6, Al7 and A6. 2x8302, C23. The 2X8302 is termed the peripheral chip since it controls all signals to and from the peripheral devices. Signals to/from the following are supervised:6.2.1 6.2.2 6.2.3 6.2.4 6.2.5 6.2.6 6.2.7 (a) Keyboard Speaker by serial link to IPC Joystick RS232 (half) (b) RS232 (half) (c) Net (4) Microdrive {e) Real-Time clock (f) Interrupt contro? 1C23, in common with IC24, works autonomously and is polled by the CPU.’ It has its own 32 kHz crystal clock X2 and has an external interrupt input on pin 2 from J1, the expansion connector. . Switch $3 connected to pin 21 resets the device when operated. Pin 28 output resets the CPU and IPC. Address lines AP, Al and AS from the CPU select the specific device requiring service viz: one of (a) to (e] in paragraph 5.2 above. The VSYNCH and PCENL signals input on pins 10 and 32 have been discussed in paragraph 6.1.1 and 6.1.7 respectively. The DSHCL signal is discussed in paragraph 3.11. Serial data from the various devices is converted to parallel data in 1C23 and output to the data bus as DBP-0B7. Parallel data from the bus is converted to serial data and routed to the relevant device for transmission. The RS232 serial link, the keyboard and the joystick operation have already been discussed in the 8049yC (IC24) section. The two Net jack plugs J9 and J10 are connected in the same way as in the Spectrum Interface 1 circuit. The network is common emitter in that all stations on the network can either source current into the net or be turned off, i.e. he set in tri-state. Jack plugs are used Such that those sockets which are unused serve to terminate the network. When a jack is inserted in the socket it opens up a connection to a 330A resistor, R15 or R16, disconnecting it from the circuit. With a network set up, the to end stations would be the only ones with the 3309 resistors in circuit. There is therefore their combined resistance, giving a pull-down impedance of about 1652 to the circuit. 1C23 contains the interface and control circuitry for the network. The real-time clock is run from the 32 kz crystal X2 on pins 31 and 30, Date and time are resettable under software control. On pre- issue 6 Qls, a trimming capacitor TC1 enabled trimming of the oscillator frequency. On the post-Issue 6 the trimning capacitor has been replaced by a fixed capacitor.6.2.8 Tel.2 TL 12 7.2.1 7.2.2 1.23 The remaining lines out from IC23 are the microdrive control and data lines on pins 3,1,19,21,33 and 34. These inputs and outputs are discussed in Section 7, MICRODRIVE. MICRODRIVE Introduction Microdrive organisation and control in the QL is similar to that found in the Spectrum, bearing in mind that the two QL microdrives are integrated into the system and that Interface 1 functions are all executed by IC23; also the frequency is different and write protect is different. Additional micradrives may be connected to the system via connector EC. Only one microdrive may be in use at any instant. The required microdrive and the type of operation, read or write, is selected under software control. During a read operation data is read from the selected microdrive tape. During a write operation the microdrive tape is erased before being written. The erase head is displaced fron the write head and is timed by 1/73 to sink current before the write head is enabled. Microdrive Selection Microdrives are selected using the MOSELOH and MDSELCKN signals from 1C23. Each microdrive control chip, C29 and 1C30, contain one stage of a shift register, realised by a flip-flop. MDSELCKN is connected to each microdrive and MOSELDH is routed to pin 22 (COMMS IN) of IC29, which is the input to the shift register. The shift register output on pin 20 (COMMS OUT) is routed to COMMS IN in IC30. COMMS OUT on 1C30 pin 20 is routed to microdrive expansion connector EC1. The selected microdrive has a 'I' on its COMMS OUT pin. Thus the required microdrive is selected by shifting the 'l' accordingly. COMMS OUT not only feeds the next microdrive; it is used to select its own chip internal functions and to select the LED, the motor, and the erase current for the selected microdrive. Therefore while this signal is low the motor is disabled, the LED is off, no current can flow through the microdrive switch (S1 or $2), and no erase current can flow. Consider the motor drive circuit for number 1 motor. A high on pin 20 of C29 turns on TR4, This pulls the base of TR6 low, turning it on and switching power to motor 1. Capacitor C21 and resistor R28 time constant ensures that the motor does not cut out too quickly and damage the tape. The red LED 020 is switched on at the same time. With TR6 turned on and write protect switch S1 closed the erase head current circuit is enabled via pin 6 of headboard 1 connector. _khen the erase output 1s enabied on pin 1 of ICZ3, transistor TR3 switches on and current flows in the selected microdrive erase head. Diodes124 7.3 7.3.1 7.3.2 7.3.3 7.3.4 7.3.5 018 and 016 provide protection against reverse currents. Diodes D12 across the erase head and D15 perform similar functions. The amount of current flowing in the erase head is limited by R25. Write protection is achieved by the action of the microswitch on the microdrive chassis. The switch is operated by the write protect tab on the microdrive cartridge. When the tab is present the select supply Tine is connected ta the erase coil, enabling the QL to write normally. When the tab is absent, the supply to the erase head is disconnected, and the MORDWL line is held high (read mode) via R100/101 and’ 022/23 (see Section 5, para 3.1). This line is clamped to 5 volts maximum by diode D29. The purpose of 022/23 is to prevent unselected microdrives with no cartridge inserted (or with write- protected cartridge inserted) from loading the MOROWL Tine. Read/Write Operations The MDROWL signal on IC23 pin 3 places the selected microdrive in either the read or the write mode, and enables the read or the write amplifiers. Data is recorded on two tracks using a standard stereo cassette head arrangement and is written in bytes, one byte to one track and the next byte to the other track. It is recovered in the same way. The tape ftself fs one continuous loop. Since hardware takes care of switching between tracks the software sees the tape as one double- Jength single track. Power to the microdrive circuits has to be filtered and IC31 and capacitors C9 and Cli are used to accomplish this. C31 is the regulator. Read Cycle. Consider 1C29 and headboard 1, In the read mode the signals appearing in the two read coils inside the heads are differentially amplified through two amplifier chains within IC29, The signals “are then converted to digital form to enable logic processing. The outputs from the two amplifiers, in digital form are enabled into the DATA 1 and DATA 2 outputs from 1C29 on pins 24 and 19, These signals are routed to the interface within [C23 via RAW (Read and Write) 1 and 2, pins 21 and 19. The signal recorded on magnetic tape is at the greatest when the rate of change of the signal imposing it is at its fastest. Therefore when a squarewave has been written, the greatest recovered voltage is obtained on the edge of the pulse. Since the object of the exercise is to produce a waveform which changes at the peaks of the recovered signal, 1C29 contains amplifiers to bring the signal up to the required level, and a peak detect circuit which changes state when the input reaches its greatest level. The peak detector is followed by a hysteresis cireuft which ensures Uhal Lie oulput does nol change on spurious signals. 1.137.3.6 8.1 8.2 8.3 8.4 1 9.2 The gain of the circuit should not need to be changed, as only one type of high quality video tape is used. The reproduced signal levels may be read across capacitors C15 and C17 and are typically in the order of 400 to 500 mV and 250 to 350 nV for the low frequency and high frequency signals respectively. In the record mode the modulator in 1C23 converts the ones and zeros in the data into FM (frequency modulation) where there is always a transition at the beginning of the hit cell. If the data is a one there is a transition at the beginning and in the middie of the bit cell, which means essentially that the Frequency doubles if the data contains ones. Hence high and Tow frequencies at C15 and C17. Write Cycle. When the MURDWL signal from IC23 goes low the selected microdrive is placed in the write mode. This has the effect of changing DATA 1 and ORTA 2 on C29 from outputs to inputs. These inputs are used to drive current sources for track 1 and track 2. When DATA 1 is high for example, current is pulled in one direction through the head, when it is Tow current is pulled in the other direction. POWER SUPPLIES A custom-built power pack, external to the main board, supplies 9 volts dec. at 2 amps and 4 volts peak-to-peak a.c. to the board input on connector J8. The power pack uses a thyristor to limit peak voltages on the d.c., but is otherwise unregulated and has significant ripple. The a.c. input is applied to two rectifiers IC37 and IC36 to produce +12 volts at 80 milliamps and -12 volts at 50 milliamps, respectively. The d.c. input is regulated down to +5 volts by regulator IC38. Al} three supplies are completely protected in that the regulators are equipped with thermal and short circuit shutdown. TEST A good simple test of the equipment may be carried out by connecting a loopback cable to the RS232 interface connectors JS and J6 and instructing them to talk to each other. The technique for receiving RS232 involves the data passing through the IPC, through ZX8302 and back onto the processor data bus. If this functions correctly it is close to a guarantee that the whole system is functional. A test tape is available which exercises most of the functions of the QL and is a useful initial diagnostic tool. See Section 3 for details.SNOLLONNODUBINE XIULYH GUVOBAIN 2°T Fun9T- zl a] evomiay aa Lal \ fae crew ok + “ sf * i 1 + WW Wy WA a8 000%|s08%) so0s|co0s] 2908 ions] som oat TITTY moti ee Pe ae RARE 1.15SECTION 2 DISASSEMBLY/ASSEMBLY Sub-Section LIST OF CONTENTS Page to. 1 Disessenbly ai Access to Internal Components 2a Microdriye ra Circuit Board 2.2 Loudspeaker 2.2 Microdrive : Disassembly for Repair 2.2 Keyboard: Disassembly for Repair 2.2 2 Assembly as Loudspeaker 223 Circuit Board 2.3 Hicrodrives 2.3 Keyboard 2.3 Case Assembly f a DISASSEMBLY 1,1 Access to Internal Components 1.1.1 Unplug all input/output leads and turn the QL upside down to reveal eight self-tapping screns, 4 x 5/16-in along the front edge, below the over-hang, and 4 x 1.1/4-in along the rear edge. Remove ‘the screws (CAUTION: ‘do not remove the two screws visible on the base immediately below the microdrives). Hold the two halves of the case together and return the QL right-side up. The top half of the case, including the keyboard, can now be separated from the bottom half, although it remains connected to it hy tuo flexible rihhon cables ‘and the leads from three LEDs. 1.1.2 To separate the upper and lower case halves completely, free the monbrane tails from the edge connector sockets on the board by pinching them between forefinger and thumb (adjacent to the socket) and then exerting upward pressure. Release six leads from the 'snap- action’ wire post socket, adjacent to the TV modulator can, by pinching the black plastic moulding between forefinger and thumb and raising it up off the board until resistance is felt; the leads can then be pulled free. 1.2 Microdrive 1.2.1 Remove the heatsink adjacent to the microdrives by releasing the attachment screw for the +5Y regulator [C35; retain the M3 x 10rm screw with brass plain and crinkle washers for assembly. aL1.2.2 1.2.3 1.3 1.3.1 1.3.2 1.3.3 14 Lad 1.4.2 1.5 1.5.1 1.6 1.6.1 1.6.2 Renove three pan-head, self-tapping screws securing the microdrive to the ‘lower case - two visible at opposite corners of the microdrive chassis (5/16-in and 1/2~in). CAUTION: not to be confused with the countersunk motor screws and a third (3/4-in) accessible from the underside of the lower case. Lift the microdrive from its mounting position and free the two ribbon cables from sockets .on the board by pinching them between forefinger and thunb (adjacent to socket) and then exerting upward pressure. Circuit Board Remove both microdrives as detailed in para 1.2, Remove the reset button. Release the loudspeaker leads from the ‘snap-action' wire post socket, adjacent to the TV modulator can, together with two pan-head screws securing the circuit board to the lower case. The screws are located in the vicinity of the external bus connector and the loudspeaker ; retain the 1/4-in screws and fibre washers for assembly. Remove the push-fit microdrive extension bung from the Tower case, and carefully work the circuit board free from the locating dowel’s by lifting it at the bus extension connector end, Loudspeaker Remove the microdrives and circuit board as detafled in paras 1.2 and Using a scalpel or similar tool, break the adhesive seal between the loudspeaker housing and the lower cover and lift the speaker from the locating dowels. Microdrive : Disassembly for Repair Stripping for repair is limited to the [Link], motor assembly and the microswitch. Each is secured by screws, readily identified once the microdrive is removed fron the Tower case. Keyboard : Disassembly for Repair Separate the upper and lower case halves as described in para 1.1. Release six 1/4-in pan head screws securing the keyboard backing plate to the upper case. This allows the plate, with membrane attached, to be lifted clear revealing the keyboard bubble mat below. The menbrane is separated from the plate by carefully breaking the adhesive seal holding the ribbun cables tn position; the bubble mat is simply lifted from its position revealing a set of keys below. 2.21.6.3 2.2 2.3 2.5 2.6 Individual keys can be removed for cleaning by holding the key depressed and gently prising the retaining sleeve off the underside of the key using a small screwdriver inserted under the rim. ASSEMBLY Assembly of the QL and tts component parts 1s generally the reverse of disassembly. Points worthy of note are given below. Loudspeaker. Attach double-sided adhesive tape, locate base over locating dowels adjacent to grille in the lower case and apply pressure to effect an even bond. Circuit Board. Locate RESET button end first and once secured, replace the microdrive extension bung and loudspeaker leads. Replace reset button. Microdrives. The ULA un the microdrive fitted in Uke left-hand (MDV1) position is protected by an RF shield. Ensure that the shield is in Place before starting re-assembly. Start assembly by straightening the bare wire-ends of the ribbon cables and then pushing them home in their respective sockets. Care is required to ensure the connections are made satisfactorily. Keyboard. The bubble mat, membrane and backing plate are perforated to accommodate six locating dowels moulded in the upper case. It may Prove advantageous to release the adhesive bond between the membrane and the backing plate to aid alignment. Case Assembly. Before screwing the case halves together, reconnect the keyboard ribbon cables and LEDs to their sockets on the circuit board. The LED connections are as follows: Pin Diode Wire Colour Function 1 D2lk Black ) MOV2 (red, 2 Dela Grey ) ey 3 208 Black ) MOVIL (red 4 D202 Unite ) ee 5 D2 Black ) eVow 5 os Black } POWER {yelTow) 2.3SECTION 3 SYSTEM TEST Sub-Section LIST OF CONTENTS Page No. Intraduetinn at system Test 3.1 Procedure 7 Power -Up . Cotour Test 7 Sound Test 3 3. 3 3 Network Test a R5232C Loopback Test 3 Keyboard Test 3 Joystick Test 3 Real-Time Clock Test 3 Microdrive 2 Test 3 Nicrodrive 1 Test 3 Nicrodrive Tape tot Inserted Correctly 3 End of Test 3 Ma 1.2 INTRODUCTION The use of the following test procedure is strongly reconmended after carrying out unit repairs, thus ensuring that a ance defective unit is completely operational before return to the owner. The procedures can also be used effectively during fault diagnosis (Section 4). Adjustments. The pre-Issue 6 Qls have a_trimming capacitor TCL associated with the reai time clock. It is factory-set to give a clock frequency of 32,768 kHz at 1C23 pins 30 and 3i and should not require further adjustment. SYSTEM TEST The system test is conducted with the QL connected to a colour monitor and a domestic colour TV receiver so checking both display paths. Additional test equipment is required as follows: (a) System 2 Test Software - supplied as microdrive cartridge. } 2B-off biank microdrive cartridges - passed as being suitable for system test. (c) RS232C loupback cable (4) 2-off industry standard joysticks 3.12.2 3 Bebe 3.1.2 3.1.3 3.14 3.2 3.2.1 With the QL powered-up and the test software loaded and running, the test progresses through 9 well-defined states during which each of the QL's functions is exercised. Some stages require the operator to respond to prompts displayed on the TV/monitor, others run autonomously outputting only a test ‘passed’ or ‘failed’ message. At the end of system test the message Ql TEST COMPLETE is displayed. PROCEDURE Power Up Connect the QL and power-up as if for normal use; check that the yellow ‘power on' LED is illuminated and the following message is displayed on both screens: GREEN BORDER RED LETTERS! WHITE BACKGROUND ‘WHITE BOROER waite LETTERS! RED BACKGROUND Connect the RS232 loopback cable, connect the joysticks to the QL's CTL1 and CTL2 sockets, insert’ the system 2 test cartridge in microdrive 1 (MDVL) and press the F2 key. Check that the microdrive 1 LED lights up when the drive is running. At some stage during program loading a title page is displayed briefly. A short time later two bleeps are heard and a message is displayed requesting a blank cartridge to be placed in MDV2. Insert a blank tape cartridge into MOV2 as requested. Colour Test After the message to load a blank cartridge into MOV2 is displayed, both screens should clear and then display the following colour test card. NOTE:On each colour bar the word ‘Test’ should be written 8 times, once fn each of the following colours from top to bottom Black ~ Blue - Red - Magenta - Green ~ Cyan - Yellow - White 3.2Display test: Flashing Yext FLASHING Colour test ell ‘ 7 : > r - WHITE LETTERS! 1 7 | 1 H ' t BLACK { : ' ' 1 i I BACKGROUND Display test complete, Type 0X fo continue WHITE BORDER’ BLACK BACKGROUND RED LETTERS) CYAN BACKGROUND 3.2.2 Check that the colours on the monitor are the same as those on the TV; check that the flashing text is satisfactory; type OK to proceed. 3.3 Sound Test 3.3.1 Check that the following is displayed: ‘Sound tes? + waite verrersy BLACK BACKGROUND Jeo cycles of trimphone fallowee by tow pitch fone Sound tes? complete {1 -reo terreasi sound OR Type OK To coarinue =) cyan BACKGROUND ‘WHITE BORDER: BLACK 3.3.2 After hearing two cycles of trimphone followed by the low pitch tone, type OK to continue. 3.4 Network Test 3.4.1 Check that the following is momentarily displayed: Network test : OK 3.33.5 RS232C Loopback Test 3.5.1 Check that the following is displayed: 'S232-C Loopback Fest wire LerTERs/ BLACK BACKGROUND [Gonneci cable and tyoe spaced ED LETTERS! ran BACKGROUND T~WHITE BORDER (erro 3.5.2 Connect the loopback cable in the QL's SER1 and SER2 sockets and press the space bar; the following message should be temporarily displayed: 'RS73I-C Loopback test (Ceonach cable and space] 9600 baud = 0x 4800 sua Om 2400 bous + 1200 bavs : O« 600 baud : Ox 300 baud : Ox 38) baud | OF RS232~C Test conplete FOR SERVICE MANUALS: CONTACT: MAURITRON TECHNICAL SERVICES [Link]. uk TEL: 01844 - 351694 FAX: 01844 - 362554 3.43.6 3.6. Keyboard Test 1 Check that the following is displayed: Keyboard test Press the dark biue bey] waive BoRoek Gace cevveRs! ‘wate Cerrens! (CrAN BACKGROUND SLACK BACKGROUND 3.6.2 Press the key indicated by a dark blue background on the display. The 3.7 3.701 blue background should be replaced by green and move onto the next key. Press all keys in sequence and note that on pressing the ALT key the message: ‘keyboard test conplete’ is displayed momentarily. NOTE:Each key should be pressed individually, NOT skimmed over. If keys have a tendency to stick, the cause should be investigated. doystick Test Check that the following is displayed: oystick test Plug in the joystick test board and type keys from left te right WHITE LETTERS] BLACK BACKGROUND FF F3 Fu FS Lei Sp Up Do WHT woROER euack cerrensy | eT Eackonouwo 353.7.2 3.8 3.8.1 3.9 3.9.1 Ignore the message concerning the joystick test board (intended for factory use only). Instead press the Fl, F2, F3, F4 and FS keys on the keyboard followed by the Left, Right, Space, Up and Down keys on the keyboard. The background colour of each key on the display should change from blue to green as in the keyboard test. On pressing the last key the message ‘joystick test complete’ is displayed momentarily. Real-Time Clock Test Check that the following are displayed momentarily: ‘Real= Fine cack fest Reset test :0K Step test 20K Count test OK Reai-time clock test complete Microdrive 2 Test Check that the following message is displayed and that MOV2 starts to run and the corresponding red LED is illuminated. a BLACK BACKGROUND Put a blank tape in HOV 1 FLASHING 3.63.9.2 Insert a blank cartridge in MOVIL. 3.9.3 After @ short delay the following message should be displayed: Bad /totat sectors : alm Prest space bar Ye continue NOTE:0n pressing the space bar two bleeps should be heard and the following message displayed in green: Microdrive 2 test Ok 3.10 Microdrive 1 Test 3.10.1 As microdrive 2 test (para 3.9). 3.11 Microdrive Test Not Inserted Correctly 3.11.1 [f during either microdrive test, the cartridge is not inserted correctly the following message is displayed in red Format faites Not enough sectors: Bad total sectors: 010 Green Beckround 3.73.11.2 Re-insert the cartridge in NDVI or MOV2 as appropriate and press the Space bar. If the test fails a second time the following message is displayed: format faites Nel eaosigh cortar Bad total sectors 0/0 Green Background Tye fresh carnage Tipe space to continue 3.11.3 Insert a new cartridge in MOVi or MDVZ as appropriate and press the space bar. If the test fails again the message in para 3.11.1 is repeated; re-insert the cartridge and press the space bar. 3.11.4 If the test fails a fourth time, the following message is displayed and the test is abandoned. Format faied| Net enough sectors Bagi toral sectars: Oro Failed microdrive test 3.12 End of Test 3.12.1 On satisfactory completion of Microdrive 1 Test the following message should be displayed on green: QL TEST COMPLETE 3.12.2 Press the RESET pushbutton and check that the display is as shown in para 3.1.1. 38SECTION 4 FAULT DIAGNOSIS AND REPAIR Sub-Sect ion LIST OF CONTENTS, Page No. 1 Introduction 4a Test Equipment a Modification History 42 Mandatory Modifications 43 2 Fault Diagnosis 43 Techniques 4.3 Power Up 44 Keyboard ar Microdrive ae Video aL Fault-Finding Guide 4lz 3 Repair ang 4 Firmware Upgrade 415 1. INTRONUCTION 1.1 Test Equipment 1.1.1 Section 4 is intended as a guide to fault diagnosis and repair. It is assumed that users have a reasonable knowledge of electronic servicing, theory and standard fault-finding techniques and have access to the test equipment and tools required to carry out the task. The table below contains a list of the minimum test equipment and materials. EQUIPMENT SPEC LF ICAT LON/MANUFACTURER Oscilloscope with probe (x10) Rise time : 0-02 us/em Multimeter General purpose Colour Television Open market New microdrive cartridges as required, Sinclair Head cleaner Open market Double-sided adhesive tape Open market Extension ribbon/connectors Make up on site for Jll,J12 and front panel LED wiring (to enable operation with cover off) 2X Microdrive Sinclair Notor location jig See Figure 4.1 1.1.2. See Section 5 for the board layouts of the Issue 5 and Issue 6 boards. al1.2 1.2.1 1.2.2 FIGURE 4.1 MOTOR LOCATION JIG Modification History The only area that has seen substantive modification is the ROM/EPRON section of the memory. The following table sets out the various fits. Build RO7EPRON. oftware: Standard|ic__ [ROW EPROM] standard Remarks 06 133 | = Bak AH 16k of EPROM mounted wc34] = 16k Pickaback on 1C33 16k of EPROM mounted Pickaback on 1C33 oul- 2 pig ek - A newly laid out [Link] was introduced at Issue 6 to reflect the removal of ICI7 and IC27 and the addition of HAL IC38. Resistors R102, R103 and R104 were added at this stage and trimming capacitor Tel was replaced with a fixed capacitor C53 of 22pF. The parts list reflects minor changes to component values. Board layouts are shown in Figures 5.1 and 5,2, 4.21.3 21 2.11 2.1.2 Mandatory Modifications Certain component modifications have been introduced to improve Performance in specific areas. These components should be checked for on all units coming in for repair, and if necessary, fitted as a matter of course. These components are listed below: {a) Add resistor R104 (82 9) in TRI collector circuit. It should be noted that this resistor is fitted in a non-standard way in the callector leg between the transistor and the board. {b) Replace resistor R92 (was 220 9) with a resistor of value 390 a. (c) Add resistor R105 (1 ka) across capacitor C19. (d)_ Add resistor R106 (1 ka) across diode DI7. (e) Add diode 022 (1N4148) in series with R100. (f) Add diode 023 (1N4148) in series with R101. : (9) Add resistors R102, R103 (33 ka) between pins 19 and 21 of 1¢23 and M12 (-12V rail). It is convenient to do this by laying the resistors on top of 1¢23 and running a flying lead from their conmon connection to pin 1 (VMI2) of IC25. (h) If EPROMS are fitted, upgrade firmware (1C33,1C34) to DLL standard and return salvaged EPROMs to Sinclair Research Limited. Details of the methods used to upgrade to Dll standard are set out in sub-section 4. (5) Add Mov2 stand-off spacer. FAULT DIAGNOSIS Techniques In a closed loop system such as a computer, because of the inter- dependance of numerous component parts, fault diagnosis is not necessarily straight-forward. In addition, because of the high speed cyclic operation, interpretation of any waveforms on control, data and address lines as being valid depends to a large extent on practical experience of the system. There are however, certain checks with valid waveforms and levels that can be carried out before substituting any integrated circuits. Experience has shown that the best method of initially checking waveforms and levels can be to compare with the same point in a known serviceable board. The following pages provide a basic fault-finding procedure and furnish a list of possible faults along with suggested ways of curing them, With a densely populated board such as in the Sinclair QL, a careful Physical examination of the board can sometimes indicate an obvious fault. Burst-out discrete components or an overheated track show up immediately, as do the attentions of an enthusiastic amateur. Bearing in mind ‘the latter, short circuits caused by hairline solder ‘splatter’ can be of Several ohms resistance and can cause some very misleading fault symptoms. 4.3261.3 21d 261.5 2.2 2.261 2.2.2 2.2.3 Tt may be that the label on the faulty unit setting out the customer's assessment of the fault is unreliable. It is therefore usually best to approach the repair task with an open mind and start the diagnosis with no pre-conceived idea of the fault. Khere the substitution method is used to check a suspect component, the suspect component should be connected into the known serviceable unit rather than the other way around. The faulty component is less likely to damage the working unit, thus safeguarding the unit and the known serviceable component. Provided first principles are adhered to and a common-sense approach is adopted, it will be found after a short space of time that fixing a faulty QL 1s very much a routine operation. Power Up NOTE: It may be advantageous to operate the QL with the cover removed, using extension connectors (see para 1.1. 1). At switch-on, the yellow power indicator illuminates and the QL should automatically power-up and produce a clear screen with the following displayed at the bottom centre of the screen: FL. MONITOR £2... TELEVISION © 1983 Sinclair Research Ltd This indicates that most of the system is working. If the Ql does not power up, and display the expected copyright screen, switch off and repeat the power-up operation two or three times+ Tt is possible for the QL to lock-up on start-up and appear lifeless. Lack of a copyright screen check voltages as set out in the table below. FUNCTION CIRCUIT REF indicates a fundamental failure. First WAVEFORM/ VOLTAGE + 12 V voltage + side of 026 regulator input +5 V voltage + side of C41 regulator input FT side of C38 + 12 V voltage regulator output FT side of ca2 +5 V voltage regulator output 15.6 Va.c. + 2.0 +9.0 Vac. + 2.0 V $12.0 V dec. £0.25 V (no discernible ripple) +5.0V 20.15 ¥ (no discernible ripple) 442.2.4 2.2.5 2.2.6 2.2.7 2.2.8 2.2.9 The state of the display screen provides a good indication of the possible fault. Three general categories of fault display may be isolated. A completely blank screen on switch-on is often caused by a faulty 1C22 (8301), Since this is a plug-in component it can easily be Substituted. If this does not cure the problem, suspect a video fault and if it has not already been done, plug in both a monitor and a TV and check for video output. If a replacement IC22 is not available, check that the clock signal to the CPU, and the RGB output signals are present. If the RAM test is seen to be starting up before the system crashes, it means that the 8301 is working and that the ROM is being read and the program is starting to be executed correctly. The start of the RAM test is indicated by the display of a fine pattern .of green, white, red and black dots (tweed pattern) which move quickly down the screen and disappear. Fault-finding would start with the RAMS in this instance, If the screen displays a geometric pattern (for example, red and green vertical bars), it means that the 8301 is working properly but is not actually starting to execute the ROM care, it is not avarwritng the RAM data. It is possible that the 8301 clock to the CPU is missing, or again that RAM is faulty. An absent CPU can also give the same effect. If the machine reaches the end of the RAM test, displays a geometric pattern and then reverts to @ blank screen it could mean any one of the following: (a) possible ROM fauTt, (b) problem with communication to 1C23 (8302) or IC24 (IPC) - check that crystal X4 is oscillating and check for activity on the serial link betwen the 8302 and the IPC (pins 29,35 on TPC), (c) lack of communication between the 8302 and the IPC - this would inhibit the copyright prompt, (4) a continuous interrupt to 1C18(CPU) - this causes the CPU to loop up in trying to service its interrupts. If the ROM enable signal (pin 33, 8301) is not present, the ROM is unable to excute correct code. If, on switch-on, randon flickering patterns are displayed, accompanied by excited beeping noises this suggests a faulty ROM. ' If the RON is functioning but the RAM is not, then the screen displays a white or green screen. Ihis testities that there is something wrong with the RAM. 452.2.10 2.2.11 2.2.12 2.2.13 2.2.14 jhe RAM test is divided into two parts, the first where it checks that it is possible to store ones, zeros and random pattern in every Rat location, and the second part a few seconds later when it checke thot the stored data is still there. A white screen means that the finer part of the test has failed and a green screen means that the second part has failed. A green screen can mean either that memory ig not being refreshed or that there is a possible short in one of the address or data lines causing mis-routing of a bit of data. Check visually for shorts Circuits across pins or address data Tines in the. RAM area itself and then further afteld (e.g. at the CPU). It may then be necessary to Garry out checks using an ohnmeter. Bear in mind that it is possible fo pbtain misleading readings when, for exanple, the meter is feeding back through the CPU. If the screen is not quite pure white or green and has either very narrow vertical stripes, or a vertical pattern of dots, this indicates that one bit in the system is faulty, either as a result of a fault within one of the RAM chips or ‘of a short-circuit across. a data/address Tine. In order to pin-point the faulty RAM chip, proceed as follows: (a) Take a probe and connect one end to ground. (b) Touch the probe on the data pin of each RAM in turn and observe the screen. (c) As the probe short-circuits a data line, a vertical black Tine or series of black lines appears on the ‘screen. When this black Tine coincides with whatever pattern is on the screen, dots or stripe(s), then the offending chip has been found. ‘In fact, since the two banks of RAM are connected together via the data bus it could be an IC trom either bank (e.g. either ICl or IC9). With this example, IC1 would need to be changed since this is part of the menory mapped area of the store. In general, a long vertical stripe suggests a data line short-circuit, and dots suggest a RAM fault. Tf RESET is pressed and a ‘tweed’ pattern is seen on the screen for a certain time and it then reverts to white, this suggests that some failure has been found in the second bank of RAM. To summarise, if on power up a white or green screen is displayed, it indicates that the RAMS are in general working, and that the machine is very close to being fully uperational. It suggests a data or address Tine short-circuit or a faulty RAM chip. 4.62.2.15 2.2.16 2.2.17 2.2.18 2.3 2.3.1 If it is plain that the machine has not really started performing the RAM check at all, check for the regular occurrence of the DTACK signal (pin 31, CPU). " If this 1s not present the RAM test can never be initiated. Check for a short-circuit on the DTACK line and check the 8301, particularly the DSMCL signal. A high level on the latter disables the 8301. Where uncertainty exists as to the best place to start fault finding, carry out the following checks by comparing with @ known good board: (a) 1023 Pin 32 - VSYNCH Pin 28 ~ RESETOUTL Pin 10 = PCENL Pins 30,31 - XTAL Pin 8 - DCSHL Pin 25 ~ CLOCK (b) Ici Pin 21 ~ DTACK 00-07 - Data Lines Pin 30 - R/T AQ-AI7 - Address Lines Pin 29 - DS. (c) 1¢22 Pin 38 - VDA Pin 36 - TXOEL Pin 37 ~ ROWL Pin 4 — ROWL Pin 33 ~ ROMOEH Pin 12 ~ csvtict Pin 9 ~ CASOL Pin 30 ~ RED Pin 8 - RASL Pin 31 - GREEN Pin 40 - WEL Pin 32 - BLUE Pin 10 - CASIL Pin 7 ~ CLOCK When the fault persists it may be necessary to start changing individual plug-in ICs, in the order IC18, 1C22, 1C23, C24 and IC28. After each change of IC the unit must be powered up to check for correct initialisation. A method of tault-finding that might be of use in checking non plug-in ICs is to use a ‘test IC’ device. This can be made up using an IC test clip, to which is attached a serviceable IC (of the relevant type for example 4164 for RAM) to bridge across each suspect IC in turn. This method is not guaranteed to work but can often save a lot of time unecessarily changing suspect ICs. Keyboard The keyboard is connected as shown in Figure 4.2. The configuration is basically an 8 by 8 matrix with partial extra diode isolation. From an examination of the faulty keys it should be possible to isolate a faulty sembrane or circuit component. Possible keybuard faults are listed in paragraph 2.6.2.3.2 Apparent major keyboard problems could be associated with the 8302 or the IPC itself but more commonly faults are likely to be on the membrane or the connectors. If a given row or column does not respond, the fault can be narrowed down to one of the connectors. If a pair of keys is faulty it could be that there is a short-circuit between them. Again, it is possible that two rows might not be working, indicating a short-circuit. Check for these with the ohnmeter. 2.3.3 To see what is happening on the keyboard, connect a double-beam gscilloscope, and trigger fron one of the’ keyboard outputs (e.g. KB01). Check that all the other outputs are going high at successive intervals. The effects of a short-circuit affect the timing of the scan pulses and can easily be seen, 2.3.4 A common fault is @ break in the keyboard membrane. If the break is 2.4 close to the connector it is possible to remove the ribbon from the connector, slice off a short section above the break and plug it back in again. If the break is elsewhere a new membrane is required. The main objective in this area is to ostablish whether the fault is on the membrane or the board. Microdrive 2.4.1 The microdrives have been a source of some problems in the pre-Issue 6 units. The mechanical layout is shown in Figure 4.3. Tlote that it is not possible to replace the read/write head on the microdrives, but all other components are replaceable. If the system test indicates a microdrive failure, the indicated microdrive, MDVI or MOV2, must be further investigated. Where the fault finding guide (para 2.4) indicates microdrive failure, refer back to this paragraph. 2.4.2 Establish that on-board voltages are correct by carrying out the checks set out in the table below. Circuit references are for NDVI (with MDV2 references in brackets). VOLTAGE CIRCUIT REF. VOLTAGE VALUE +5V 1C30(1C29)pin 11,7,9 | +5 Vdc. £0.25 V (no discernible ripple) +oy Pin 6(6) of ribbon +9¥ connector 2.4.3 Microdrive problems can be conveniently split into mechanical and electrical faults, some typical faults in both categories are listed in para 2.4.6 below. 482.4.4 2.4.5 2.4.6 If it is not possible to load from either microdrive, load MOVI with a known serviceable pre-recorded tape and key in the following program: 100 DEFine PROCedure sedes(n,flag) 110 reg=98336:pc_sel=2+flag 120 FOR i=1 TO n~ 130 POKE reg,pc_sel 140 pe_sel=pc_sé166253 150 PORE reg,pc_sel 160 pc_sel=2 170 END FOR i 180 END DEFine 200 DBFine PROCedure start_mdv(n} 210 sedes n,1 . 220 END DEFine 300 DEFine PROCedure stop_all 310 sedes 8,0 320 END DEFine Key-in_ start_mdv(n) to turn on drive number n and to keep it spinning continuously. Key-in stop_all to stop all drives spinning. (a) Start microdrive 1. (b} Using an oscilloscope, check that a signal is present from the read head (INA, IC29)’and trace it through to the RAW inputs on the 8302, (c) If there is nothing coming from the head, then the head is faulty. (4) If there is an input to [C29 but no output, it suggests a faulty IC or headboard component . (@) Check the connector in the same ways (f) Carry out the same procedure on microdrive 2. If both drives appear to be working it could be that the fault lies in the 8302. Since it is a plug-in chip it is easy to check this. (g) Check the clock signal on pin 25 of the 8302. An alternative method is to use a known serviceable ZX microdrive plugged into the microdrive expansion port. This isolates faults to either the machine or the microdrives. Load and run the system test tape. Section 3, System Test, provides details on how to load this test. The following table Tists possible faults and remedies. Where it is necessary to change or adjust the position of the motor, the motor jig (Figure 4.1) must be used. 49SYMPTOM REMEDY Screen displays 'Put a blank tape in MDV1 (MDV2)" even when tape present Check/replace TR7 (TR6), Replace 1C30 (1C29), Screen displays 'Failed microdrive test’ (1) Cheek for write protect tab on cartridge. (2) Check headboard connector (HBC)1(2), (3) Check microswitch, (4) Check/adjust motor. (5) Check R35(R34) R37(R36), ¢16(C15) ,c1a(ci7). (6) Renew 1¢30(1¢29). (7) Renew 1¢23 (8) Renew 1022, Microdrive does not operate when selected. Tight cartridge tape. Noisy operation, Fails to format. vanmed tape, Damaged cartridges. Microdrive incompatibility. (1) Check TR7(TR6), TRS(TRA) (2) Check motor. (3) Check microdrive mechanics for: (a) Weak clamp spring (listen for} clicks/erunch sounds). (b)Faulty/maladjusted rollers. (c)Adjust. motor. NOTE:If motor has over-heated, check for buckled baseplate. Renew complete microdrive unit. (4) Check HBC1(2),. Head failure. Renew complete microdrive unit. 44102.5 2.5.1 2.5.2 2.5.3 SYMPTOM REMEDY LED failure. Renew LED (LED is push-fitted). Check mod state (see Section 4, para 142.2) Unreliable loading/saving, (1) Renew 1€30(1¢29). machine Tocking-up. ) Renew 1C23. (3) Check motor position and roller. Continuous running HOVL(MOV2). | Renew TR7(TR6) MDVs do not activate, Renew 1C23. Erase function not working. (1) Check TR3,028. (2) Renew 1¢23. MDV1(2) does not run Check TR7(TR6), TRE(TR4) Video Video faults are either total, when there is absence of monitor and TV signal, or may be categorised'as either monitor or TV faults. If a TV is initially connected and is giving no picture it might be worth tuning the set slighly either side of the expected tuning point. (It is possible the modulator has drifted slightly). If a picture fs displayed but without colour, use the oscilloscope to check that crystal X3 is actually oscillating. Look at the video output and check for colour moduiation on top of the luminance signal. If it appears that chrominance and luminance are present at the video output but the TV does not give colour, it probably means that the crystal frequency is wrong and the TV cannot lock on to it properly. If no chroma is present then the chroma oscillator is not oscillating. If the chroma is present and there is no TV colour it is possible that changing slightly the value of C31 may be sufficient to bring back the colour. Check, using a monitor or by looking at the signals that RGA inputs are present. If they are, consider changing IC28, and checking the circuitry around it. It is possible that the modulator is faulty. This is checked by rewoving IC26 and feeding the VIDEO signal (from TR9) in via RES. This gives a rather low contrast signal in black and white only. 4.12.6 2.6.1 Fault-Finding Guide The following table is not intended to be an exhaustive list of the faults that might occur on the Sinclair QL. It is intended as a guide only to possible courses of action to follow when faults show up in particular areas of the circuit. These areas are listed in the table with sub-headings, in no particular order of priority. It is envisaged that the system test has been loaded, or an attempt has been made to load it, in order to check for a faulty condition. AREA SYMPTOM ACTION Screen | TV/monitor screens black. | Check voltages Power light on. Fails to (para 2.2.3) power-up. Renew C22 Renew 1¢24 Check RAMs Renew IC34 Renew IC18 Renew 1C33 Power PSU noisy. Change PSU Loss of power. Check 137, 1€36 Display | Erratic display after Check RANS. warm-up period. No colour TV output. Check €35,C36,R85,R86. Check C29,R54 and components around 1¢28, Renew modulator M1. Renew IC28. Dark TV screen. Renew modulator M1. No B/W TV output. Renew TR9, No colour monitor output. | Renew 1¢22. Fails colour test. Renew crystal X3, Colour Toss/fades. Check component's around Renew 1¢28. TV output distorted. Renew 1¢35. No TV output. 4.12APPENDIX A TO SECTION 4 KNOWN BUGS AND THEIR REMEDIES Sub-Section List of Contents Page No. Monitor Connections AL Known Bugs a3 Printing Problems AS SER Outputs AS How to Cure a Crashing Ql aS Plickering Displays 26 La 1.2 1.3 La LS, MONITOR CONNECTIONS You may have been experiencing difficulty in getting an adequate performance from a monitor connected to your QL. Given below is a revised set of wiring instructions for the connection lead. ‘these instructions replace those given in page 31 in the Concepts section of the QL User Guide. Monitor Connections. A monitor may be connected to the QL via the RGB socket on the back of the computer. Connection is via an 8-way DIN plug plus cable for colour monitors, or a J-way DIN plug plus cable for monochrome. The RGB socket connections are as in the following table, and the column indicating wire colour refers to the colour coding used on the B-way cable and connector available from Sinclair Research Ltd. Pin designation is as shown in the diagram attached. A monochrome monitor can be connected using a screened lead with a 3- way or an way DIN plug at the QL end. Only pins 2 (ground) and 3 (composite video) need to be connected via the cable to the monitor. The Connection al Uw uniter end varies according to the maitoc bul is usually a phono plug. The monitor must have a 75 ohm IV pk-pk composite video non-inverting input (which is the industry standard). Both 3-way DIN plugs and phono plugs are commonly available from audio shops. An RGB (colour) monitor can be connected using a lead with an 8-way DIN plug at the QL end. ‘The connection at the monitor end varies according to the monitor (there is no industry standard) and is often supplied with it. A suitable cable with an 8-way DIN plug at one end and bare wires at the other end is available from Sinclair Research Ltd. A composite PAL monitor, or the composite video input on some VCRs may work with the QL. Only pinc 2 (ground) and 1 (composite PAL) need to be connected via a cable, to the monitor or VCR. alp>—————_—_—_—_——__ Diagram of Monitor Connection ees Viewed from the Rear of the QL POWER RGB Wire Pin | Function | Signal Colour | Signal Level 1 | PAL Composite Pal Orange | 1V pk-pk into 75 ohm 2 leo Ground Green 3. | vipeo Composite Mono Video | Brown | 1V pk-pk into 75 ohm 4 | csyne Composite Sync Yellow | 0 to SV TTL (active 1ow) 5. | vsync Vertical Sync Blue | 0 to 5v TM, (active high) 6 | GREEN Green Red 0 to SV TTL (active high) 7 | RED Red White | 0 to 5v TTL (active high) 8 | Bie Blue Purple | 0 to 5V TTL (active high) a22. 21 KNOWN BUGS ‘There are a number of bugs still live in the QL. Some are rather obscure, but here is a list of the ones that could cause a customer to return a Ql as "faulty", together with the clue you should look for when you suspect a bug is the real problem. fa) (> {c) (a) te) (f) (9) yy I£ you delete a“procedure which was at the end of a program and then call the same procedure from the keyboard, and then call CLEAR, the QL may crash. Clue: Computer crashes after CLEAR command. "LIST" within a program can cause various unfortunate states, e.g. "not implemented”. Clue: "LIST" within a program. ‘The conmand “CURSOR #n, a, by c, d" is not accepted. Clue: "CURSOR #n, a, b, c, d" gives "bad parameter" (NB: message "channel not open" is NOT a bug). I£ an expression in a DATA statement starts with a bracket [(I, the rest of the DATA line is ignored. Clue: DATA Lees, (seedy seeee GOSUB in short FOR loops can act as ENDFOR. Clue: GOSUB in a short FOR loop. IE you ask for DIR miv8_, then DIR miv2_ will not work properly thereafter. Clue: DIR mav8 NOTE: A bad microdrive 2 can cause the same symptoms, so beware! If a program aborts in the middle of a PROCedure, and you type EDIT, you get “not implemented", and you are left editing a Spurious line number. Clue: EDITing PROCedures. Sometimes variable names get over-written by the word “PRINT". ‘This is random, so far as we know. Clue: "PRINT" in unexpected places.2.2 2.3 24 (3) If you declare more than 9 local variables, all sorts of unexpected things can come up on the screen. Clue: LOCal ay by cy dy ey fy Ge by iy jy seeee Note that if the "fault" can be repeatedly demonstrated on the customer's QL, but not on another one with the same ROM version, then it is not a bug. If the fault cannot be reproduced at all on the customer's Ql, then it MAY be a random bug (e.g. item (h) above), but this is most unlikely. In some circumstances, the use of slices of strings leads to memory being allocated which cannot be reclaimed without the use of CLEAR. Bither of these will run out of memory eventually: 10 DIM a$(10,10) 20 a$(5) = "hello" 30 REPeat x: PRINT a$(5, 1 10 4) or 30 REPeat x: PRINT a$(5) (1 TO 4) CLEAR, LOAD or NEW are the only ways of getting this memory back; these commands delete all the variables. (Remember that RUN on its wn leaves variables untouched - put a CLEAR and/or restore at the start of your program if you need to). To avoid this problem, use: 30 REPeat x: temp$=a$(5): PRINT temp$(1 10 4) ‘This problem only arises with string arrays, not with numerical ones. One bug has inadvertently been introduced into the QL with the introduction of the JS ROM. In a procedure, if you SELect ON one of the parameters of the procedure, you get “bad name", unless you are SELecting ON the last one. ie. DEP PROCedure £ (x,y) SBLect ON x gives "bad name" SElect ONy is OK. ‘nis bug is only present in the JS ROM, You should also note that you cannot SELect ON a character string. Ad2.5 2.6 Bel 3.2 3.3 4 41 4.2 4.3 5. 5.1 5.2 Another obscure bug on the QL is as follows. If you ever open the SER2 port, either by an explicit OPEN comand, or indirectly by LOAD, COPY, “SAVE etc, please note that the channel can never be properly closed again, even using the CLOSE command. In fact CLOSE (SER2) closes SER2 output and SERI input. One effect of this is that if you subsequently input data via SERl, and you have a device that is also trying to send to SER2, the data streams will get muddled. One way round the problem is to unplug the lead from SER2 when not in use. This bug is present on all current versions of ROM (AH, JM and JS). PRINTING PROBLEMS If a customer complains that his printer will not print more than about a page of output from his QL, he should check the wiring in the lead. Many printers require the DTR line to be connected to pin 20. Some of these, by chance, work with the DIR line connected to pin 4, until one buffer full of data is printed. If the problem does occur, look at the wiring of the RS-232 lead on the end that connects to the printer, and check that a lead exists, connected from pin 4 to pin 20. SER OUTPUTS ‘There is one potential fault with the SER outputs from the QL that is not obvious to find. Z£ either pin 1 (ground) or pin 6 (+12v) is not properly connected (e.g, lead not soldered to pcb), on either SERI or SER2, the port may work, although any device that draws power from the QL, (e.g. a Serial-to-paraliel converter) would not operate. Apart from checking visually, one test would be to connect pins 1 and 6 externally and check that 15mA to 20 mA of current flows. HOW TO CURE A CRASHING QL You may have a QL that "freezes" after a few hours of operation. We do not yet fully understand why this happens with some computers. To cure the problem, take out all the ICs that plug into sockets, in the main peb. Using some proprietary cleaning fluid, clean the legs of the ICs, ai] Ue sockets; then replace the ICs. In most instances, this cures the fault. aS6.1 6.2 FLICKERING DISPLAYS Run the following program to demonstrate an annoying screen flicker. 10 BLOCK 40,40, 40,40, 20 20 Go 70 10 ‘This is common to all QLs, and all versions of ROM. You can also see the effect if you move window 0 to put the cursor near the top left-hand corner of the screen. In this position the cursor has not had time to refresh itself before the screen refresh reaches it. FOR SERVICE MANUALS INTACT: CONTAC MAURITRON TECHNICAL SERVICES \[Link] TEL: 01844. 351694 FAX: 01866 . 350584AREA SYMPTOM ACTION Display | Blurred vision. Renew 1C22, (contd) TV picture drifting Check €23,¢24,¢25. continuously. T/monitor picture Renew C22. drifting. Gradual toss of colour in use. Keyboard | Fails keyboard test: Keyboard does not respond. | Check connectors J11,J12. Check ribbon cable. Multi-character printing. | Renew menbrane. Keyboard bounce. Keys sticking down. Key(s) does not register. Key(s) does not always Renew bubble mat. register. *Sticky’ key(s). Clean key surfaces. Renew bubble mat. Continues to fail keyboard | Renew IC24 test. Renew IC18 Keyboard locks-up after Renew 1C23 Protonged use. Renew [C24 Renew IC18 RS232-C/ | Fails RS232 loopback test. | Check J5,J6 Printer Renew 1C25,1C26 Renew 1C23 Renew IC2a Network | Fails network test. Check J9,J10 Check TR2 and associated components.3.1 AREA SYMPTOM ACTION Sound Fails sound test: No sound Check TRI Check R104 (post-Issue 6) Renew [C24 Real-time | Fails real-time clock test | Check R91,R80,C1,C53. clock Joystick | Fails joystick test. Check J3,94,J2 Fails Does not reset. Check reset switch. reset Check reset switch spring. test General | System locks up after Renew crystal x2. prolonged use. Computer ‘crashes’ at Renew 1C23 random intervals or Renew I¢34 after prolonged use. Renew C24 REPAIR Renewal of components should be carried out using recognised desoldering/heatsinking techniques to prevent damage to the component or to the printed circuit buerd. Other points to be noted are listed below: (2) When replacing a keyboard matrix, take care that the ribbon connectors are fully inserted into the board connectors, and are not kinked during insertion. (b) Make sure there is a good contact made between the voltage regulator (IC35) body and the associated heatsink in order to ensure adequate heat conduction. {c) When reguiator 1C35 is being renewed it is recommended that a suitable proprietary thermal grease is applied to the rear surface of the component body. (4) The modulator should be renewed as a complete unit.4.1 42 4.3 (f) (9) When renewing/replacing plug-in ICs it is advisable to use the correct removal and insertion tools. Avoid contaminating the connection pins by hand] ing. When handling ICs take normal anti-static precautions. It is recommended that only a suitably earthed, low power soldering iron be us: After any component has been renewed the circuit board should be examined carefully, to ensure that there are no solder ‘splatters’ which may cause short circuits between tracks or connector pins. FIRMWARE UPGRADE It is often obvious that an upgrade is required by the presence of a pickaback device in position [C33. However, in all instances, refer to the build standard and serial number found on a label stuck to the bottom of the case, e.g. 009 123456. Prefix 009 refers to the build standard and 123456 gives the serial number. All units to build Standards D8 and below, plus 010, must be upgraded to N11 or later firmware. The materials for the upgrade are: (a) 1 x 32k ROM 1 x 16k ROM build standard JM - see parts list 3.x wire Tinks The upgrade is carried out as follows: (a) (o) (c) (d) (e) (f) (9) th) (i) (k) Remove top cover (refer to Section 2, Disassenbly/Assembly) . Remove and discard any kynar links from Al4,1C34 and JU points. Remove all links. Remove IC17 (74LS00). Remove 1¢33 and 1¢34. Fit links JU2,JU3 and Jug. Fit 32k ROM to 1C33 position. Fit 16k ROM to IC3¢ position. Refit top cover. Return EPROMs to Sinclair Research Ltd. 4.15si[ va] ¢ v] ea) 2a} 13 ? $ Ol eer elem ay ayo a7 { * Oita) xy af af A ) a Ciesev eee eae A = aa ata] s[ 007 + Ohaaee savo BS |eeiee ais eee al sreaalaa7| ete Z| > Ale Aled wana, wal +[ sa) > y 3 TW |caTHS| TaI9| Ole oe Oe ere Wee FIGURE 4.2 KEYBOARD FORMAT 4.16E E ORIVE ROLLER HEAD SPRING DRIVE ROLLER(RUBBER) WITH PLASTIC ROLLER UNDER MOTOR LOCATION HOLE “| [ohne ue re PLASTIC ROLLER FOR SERVICE MANUALS CONTACT: MAURITRON TECHNICAL SERVICES VIEW A www. [Link] TEL: 01844 - 951694 FAX: 01844 - 52554 HEAD ASSEMBLY Post (2) SIDE SPRING ° 9 ® si 2 MICROSWITCH view Q ° MOTOR LOCATION HEAD ‘HOLE: ASSEMBLY FIGURE 4.3 HEAD CHASSIS 4.17APPENDIX B TO SECTION 4 USER HINTS ‘The following points may be of help in spotting ‘non-faults' on Qls. fa) (b) tc) (a) te) Please note that if you want the QL to tell you which version of ROM it has, you should enter ‘PRINT VERS’ and not "PRINT VERS'. If you try to run Abacus, Archive, Easel or Quill on microdrive 2 instead of miccodrive 1, you get an error message, typically 'AT END 200 NOT FOUND'. When saving data on microdrive 2 while using Abacus, etc., remember to use a formatted cartridge in microdrive 2 otherwise you get the message 'CANNOT OPEN FILE". I£ you have opened a data file when using Archive, remember to close it before removing the cartridge, otherwise future access may be difficult. If you press the SHIFT key at the same time as the space bar, nothing happens when you are using Super Basic. BlAPPENDIX C TO SECTION 4 MANDATORY MODIFICATIONS Sub-Section List of Contents Page No. Pitment Checks a Improvement to Microdrive Performance cL Ll 2. 221 3.1 PTTMENT CHECKS Refer to the mandatory modifications described on page 4.3 and page 5.1 in this manual. To check that if these modifications have been made, look for R102 and R103 through the SERI port. If these resistors are in place you can assume that the other modifications have been carried out. With build state D12 or higher the modifications have already been incorporated. IMPROVEMENT TO MICRODRIVE PERFORMANCE On any QL requiring repair, it is recommended that the following modification be automatically carried out at the same time. On Issue 5 boards, cut the +5V track in position A on the component Side of the board and in position B on the solder side. ‘Then connect two links as shown in positions C and D. (See Figures Cl and C2). On Issue 6 boards, both track cuts are on the solder side. (See Figure C3). ALL current production incorporates this modification, which is identified by serial number D16 or higher, or modification label A4 or higher. COLLAR FOR QL MICRODRIVE 2 On any QL for repair, fit a special collar beneath the far right fixing screw of MDV2 (the screw by the side spring). ‘This is to prevent the lid of the QL from hitting the top of the MDV2 board, which can upset the position of the head. Use a countersunk screw in Place of the original one. Collars are available from Sinclair's normal spares distribution channels. cl(2-QU11/13/THS) 3OIS Y3OTS - GYvOR s 3nSSI z9 3UNOTI @ sod OVUL 1D 3APPENDIX D TO SECTION 4 MICROORIVE FAULT FINDING Sub-Sect ion LIST OF COMTENTS Page No. 1 Introduction DL 2 Mechanical Checks DL 3 Using the Signal Test Program D2 Weite Check 2 Read Check 3 Erase Check D3 4 Faults on Early Microdrives Da 1, INTRODUCTION 1.1 This guide is intended to give a base of understanding for the most 1.2 1.3 La 15 2 21 frequent faults occurring on Ql microdrives. It contains descriptions of faults and tests to help in finding them. ‘The microdrive is a slave mechanism for transferring data to and from magnetic tape. Its role therefore is not interpreting data, but ensuring that data presented to it for writing is read and returned in the same manner. Before tackling signal testing, it is recommended that a mechanical check is carried out as detailed in Sub-Section 2, as this can save time, depending on the fault. ‘The program "SIGNAL TEST' sends 100kHz to a microdrive in write mde, (erasing simultaneously) then puts it in read mode so that signals returned can be observed. ‘This enables the performance of electronics and mechanics to be assessed with a steady waveform on an ‘oscilloscope. A two channel oscilloscope is required, as this can be set for measurement of differential signal nodes by adding CHl and CH2 and inverting CH2. MECHANICAL CHECKS Mechanical faults can adversely affect readability of tapes and subtleties, if not appreciated, can lead to a ‘witch hunt’ for a fault. The following exercises help, though it must be stressed that the mechanics are inter-dependent, so over-adjustment of one aspect way affecl alec. ‘Tue effects Of mechanical faults can be seen by using the signal test program as for read faults. pL2.2 2.3 24 2.5 2.6 2.7 3.1 3.2 3.261 Roller: The motor drive roller should not be distorted in any way and should have the specified gap between it and the collar beneath it. Motor Position: If not correct, this can cause tape slipping and speed problems. If these problems exist, check position using the appropriate jig. Side Spring: With the tape spinning in the drive, push the cartridge away from the roller, depressing the spring. When released, the cartridge should retuen and spin freely against the roller without slipping or jitter. ‘The top of the spring should be reasonably level and it should not foul the chassis. Head Position: The digital head should have both front feet and at least one rear foot touching the chassis. It is not always possible for the other foot to touch due to head manufacture adjustments. If the head is tilted up, down or sideways, it will compound the ‘effects described for head spring. ‘The face of the head should be clean. Head Springs: Poor compatibility can be caused if this is weak or distorted. Looking from the front of the drive, the top of the springs should appear about level with the bottom of the lower head guides. ‘The effect of the springs can be checked using the signal test program as in sub-section 3 below. A tape should be written to and the pk~pk level noted when reading. This level should be reasonably attainable after the cartridge has been twisted clockwise and released and then anti-clockwise and released. There is a problem if the level drops significantly after settling for 7 seconds, in either direction. USING THE SIGNAL TEST PROGRAM To use the ‘signal test’ program (Table Dl) proceed as follows: (2) Load the program into the QL and remove the program cartridge. A known yood blank vatleidye should be inserted into the drive to be tested. (b) The progeam asks which drive is to be analysed and when this has been entered, 100kH2 is written to the cartridge in that drive for 8 seconds. the QL then ‘beeps' and the drive is then "reading’ the cartridge. (c) Pressing the SPACE BAR stops and starts the process. Write Check When ‘signal test' is writing to tape, check that TTL data lines ULA pins 19 (24) are correct, as fig Dl. If so, look at pins 4 and 5 (14 and 15) and compare to fig D2, IE the signal is not present it is due to a faulty ULA or head. 23.3 3.3.1 3.4 Bede 3.4.2 a 41 Read Check After writing to tape, carry out the following while in read mode. (a) Check data lines ULA pins 19 (24) and compare to fig D3. If the waveform is very unstable in X axis, a mechanical fault is probable. If the waveform is poor or is not present at all check the pk-pk signal at pins 4 and 5 (14 and 15). See fig Dé. (b) If the signal is present and correct there is a fault in the intermediate read stages. See circuit and fig DS. If the signal is not present at all and the write check is correct, then the head is faulty. (c) A low voltage at this point, due to a worn head, however can cause soft errors to occur when reading (e.g. 150 ni pk-pk) « (4) If the waveform is very unstable in the ¥ axis (greatly differing Pk-pk levels) the erase function is suspect. (ihis effect can also be caused by a poor tape). Erase Check ‘This may be found to be necessary from the write and read checks. ‘The effect described is due to residual magnetism in the tape from Previous recordings not being erased when recording.” ‘The microswitch is usually the culprit and can be checked for operation with power removed using a multimeter, To check erase using ‘signal test' program, measure the following voltages: (a) during write/erase cycle: HBC, Pin 11 : Non Write Protected 5.6V Approx. Weite Protected 0.8V Approx. (b) during read: WBC, Pin 11 : Non Write Protected 9.0V Approx. Weite Protected 0.1V Approx. FAULTS ON EARLY MICRODRIVES wo faults are described below which may be present on some earlier microdrive ULAs but have since been remedied: Pin 1 Latch Up: ‘This was known to occur at power on or during writing. The pin voltage sometimes 'latches' at approximately 4V and does not return to normal signal or quiescent value. Data Line Non Tri-State: This does not affect the drive which is faulty, as this appears to work normally. When inactive, the data lines should be tri-state, but some have been known to remain at approximately 4.5V, thus preventing the other microarive(s) to function. It is unlikely that any escaped factory production tests. D3la ReMark STBNAL TEST via 20 REMark 15.4.95, CWS,Tech. Services 3@ REMark THORN-EMT DATATECH, FELTHAM. 4@ PAPER @ : INK 7 5a cl 69 CSIZE 2,1:PRINT" SIGNAL TEST V1.Q":CSIZE 2,0 72 PRINT\ "Enter drive choice, 1 or 2" 89 INPUT x: 93 IF x = 1 THEN SIGTEST 1: ELSE SIGTEST 2 19@ GO To sa 11@ DEFine PROCedure SIGTEST (DRIVE) 128 CLS 13@ PAPER @:INK 7:CLS 14@ PRINT\\"PRESS SPACE TO RUN DRIVE ";DRIVE 15@ PAUSE 162 PRINT\"Hriting...." 170 POKE 98336,2:P0KE 98326, 182 IF DRIVE ="2 THEN POKE 99336, 190 POKE 99356,1:REMark set 12QkHz 208 POKE 95336,12 212 PAUSE aaa @ BEEF i90@ DB PRINT\ "Reading..." 240 PCKE 98338,8 250 PRINT\“FAESS SPal 240 PAUSE 270 PORE 9385 280 IF DRIVE 290 END DEFine 5@@ DEFine PROCedure save_data_io 1@ OPEN #4:ser1 20 FRINT#S:CHRS (Q):CHRS (255) 4 RIVE, 50 CLOSE wa SS ayes FOR SERVICE MANUALS 350 SAVE seri CONTACT ee MAURITRON TECHNICAL SERVICES wow, [Link] TEL: 01844 - 351694 FAX: 01844 - 352554 a TABLE D1 SIGNAL TEST PROGRAM ——————__—Too x2 MUTE sso" Ses W/DIY—OMFFERETIAL HL AMD (LH) acRnne¥e SI6AMs (100 hz ARETE) ara ssn" cab s00 mt ory 21/017 (SHDN BE 10 POD ROLLER) Pins 0 5 0 100 SOW/01¥DIFEREATIN, GH and 2 (IKE) a 100 it ichDRIYE StGAMs (100 mhz Ae4a) —— Ds, uk 0 2 = unin roma [Link]) [rte 06 Mas 6 1 unin oem (AH0186) aan 2H aT 0 2 nine ins (A01N) ri ca sire 0H RIVE SIGAAS (FORMAT ERD)AINOWID WNYBINI - Lo09z VIN 60 TdSECTION 5 PARTS LISTS Sub-Section LIST OF CONTENTS Page No. pone Serial tubers Parts List/Modi fication History Retrospective (Mandatory) Modifications Notes to Tables 1 Ld 2a 2.2 SERIAL NUMBERS The serial number is visible on a label attached to the underside of the Sinclair QL thus : 013 59643. Prefix D13 relates to the build standard (B/S) and Issue ‘umber; 59643 is the number off the production run. PARTS LISTS/MODIFICATION HISTORY Parts lists for the Sinclair Ql are presented in tabular form. They cover [Link] Issue 5 (build standard 06 to 013) and [Link] Issue 6 (build standard 14 and beyond). The Issue 6 [Link] introduces a number of relatively minor circuit changes from Issue 5.. These are illustrated in Figures 5.1 and 5.2 and itemised in Tables 5.1 to 5.5 under separate columns labelled Issue 5 and Issue 6. Items listed on Issue 5 relate to build standard D13, incorporating the latest version firmuare (i.e. 32k and 16k JM masked ROMS in 1C33,1C34 respectively). Earlier build standards (06 to DIO) saw the progressive introduction of improved firmware starting with @ pickaback 16k EPKOM replacing the external ‘dongle’. A history of these early units is tabulated below. BUILD STANDARD 1¢33 1034 MASK, 06 2 x 16k EPROM 16k EPROM AH 07 2 x 16k EPROM 6k EPROM M 08 32k RON 16k EPROM AH 09 32k ROM 16k ROM A Dio 32k EPROM 16k EPROM oM D11-p14 32k ROH 16k ROM ot 5.13.2 Bd Build standard D12 saw the introduction of modifications to the microdrive circuits followed by a new microdrive cartridge chassis at build standard 013, The JM version ROM firmware and microdrive improvements were carried out to Issue 6 (build standards 014,015), RETROSPECTIVE (MANDATORY) MODIFICATIONS In order to improve performance and reliability the following components must be added/replaced on all pre-build standard 12 QLs returned for repair (see Section 4). (1) R104 (82 3) introduced in TR1 collector circuit. (2) R92 (formerly 220 2) increased to 290 9, (3) R105/R106 (1 kM} introduced across 019,017. (4) 022/023 (1114148) introduced in series with R100/R101. (5) R102/R103 (33 ko) introduced between {C23 pins 21 and 19 and W12 (-12 V rail). (8) Firmware (1C33,1C34} to be upgraded to build standard D11, NOTES TO TABLES (1) Early Issue 5 boards fitted with 42 ka resistors; do not replace unless it does not meet colour test criteria. (2) Retrospective (mandatory) modification required - see sub- section 3 (above) and Section 4 ~ Fault Diagnosis and Repair. (3) Fitted according to build standard and Issue. (4) BC183P is alternative type - NOTE: Teads are reverse of BC1E4, (5) C17 only fitted on Issue 5 EPROM versions. (6) C38 replaces IC27 on Issue 6 versions. 5.2TABLE 5.1 GENERAL ASSEMBLY Description Manufacturer/Type QL Base Assembly Microdrive Chassis (2-off) - Table 5.3 Final PCB Assembly - Table 5.5 Loudspeaker Assembly Heatsink Assembly - Table 5.2 Bottom Case Moulding Bottom Case Fixings 1/4-in self tap ~ 2 off) Pca Fibre washer - 2 off) Fixings 5/16-in self-tap ~ 2 off) U2rin self-tap 2 off) MOV Fixings jin self-tap - 2 off} QL Keyboard Assembly Yellow LED (027) Red LED - 2 off (020,021) QL Membrane Keyboard Backplate Keyboard and Bubble Mat Keyboard Assembly Fixings Adhesive Cable Clip Double-sided Tape (0.5-in wide) 1/4-in self-tap ~ keyboard backplate ROM Cartridge Bung MDV Extension Bung BUS Extension Bung General Assembly Fixings 5/16-in self-tap - 4 off) Keyboard/ 1 1/4-in self-tap -4 off) Base 60.9, 23 mm, TV |FOR SERVICE MANUALS CONTACT: MAUJRITRON TECHNICAL SERVICES. [Link] TEL: 01844 - 351694 FAX: 01844 - 352554 5.3TABLE 5.2 HEATSINK ASSEMBLY Description Nanufacturer/Type Heatsink Wakefield Mk.2 +oV Regulator (1C35) 7805 3-pin connector Molex, 4025 Heatsink Fixings M3 x 10 rm pan hd screw l-off M13 plain washer L-off #3 crinkle washer L-off TABLE 5.3. MICRODRIVE CHASSIS Description Manufacturer/Type Microdrive Cassette Chassic Assembly Cassette Chassis Motor Assembly Microswitch Assembly Drive Roller (parallel) Plastic Roller Cassette Chassis Fixings 12.5 x 4 csk self-tap,notor fixings 2.28 x 3/8-in self-tap,microswitch fixing Nicrodrive PCB Assembly - Table 5.4 PCB Fixings No.4 x 5/16-in self-tap (2 off) Fibre Washers (2 off) ULA Screen 5.4TABLE 5.4 MICRODRIVE BOARD Circuit Ref Rating? Nanufacturer7 novi_juove | issue 5 | issue 6_| Notes 4 Tol Type CAPACITORS (a11 axial types unless otherwise stated) cs | c6 330 pF 2.5% HS30, Suflex ca | clo | 0.47 F 35v MT Gils | seize) | 020Fe 35v iT 13 | cia | 330 pF 2.58 HS30, Suflex cis | c16 | 220 pF 2.5% HS30, Suflex ci7 | cis | 220 pF 2.5% HS30, Suflex cag | cso | 47 nF 50v ce. | cs2 | 47 nF Sov Deze | ocz9 | 100 F SOV, 1020s, RESISTORS 3a [x25 | 330k 5%, 1/4W R36 | R37 | 330R 58, 1/4 R38 | R39 | aK7 A A/a rao | Ral | 4k7 t/a raz | raz | 47 As 5, 1/4 rag | Ras | ak7 Issue 5 5%, 1/4W R100 | R101 | 2k2 4 DIODES biz | ois | 1naias p14 | 15 |. anaiae o22 | pez | inaias, (2) INTEGRATED CIRCUITS 1cz9 | 1c30 | 26007- ULA Ferranti Issue 3 Teal | 1¢32 | 72H05 +5 Regulator MISCELLANEOUS Hecx | HBc2 | A1oo2 2-0ff Toway flex. each connector/ cable 5.5TABLE 5.5 FINAL BOARD ASSEMBLY % Issue 5 | 1ssue 6 Racial ta DEE CAPACITORS, cl 82 pF 5% Ceranic c2 22 pF 5 Ceranic/TB ca 4.7 uF 25, -LOBH5O% Electrolytic/Axial cig 47 nF Sov £20 47 oak Sov 2 22 uF 16V Electrolytic/Radial C22 22 uF [As Issue 5 | 16v Electrolytic/Radial 23 2 oF 16V, -19%+50% Electrolytic/Axial C24 22 uF 16¥, -L0%+50% Electrolytic/Axial 025 22 oF 16V, -10%¢50% Flectrolytic/Axial £26 0.01 uF 20% Ceranic/T® C27 Ol uF SOV, -20%480% cae OL uF SOV, -208+80% €29 220 pF 108 30 220 pF 10% c31 16 pF | 22 oF 5x Ceramic 32 0.01 uF 20% Ceramic/TB 33 Ol uF SOV, -20%+80% 34 47 pF 5t Ceramic/TB C35 100 uF =10%, +808 Etectrolytic/Axial 36 47 nF sv ¢37 470 uF 25V,-10%+50%, Electrolytic/Axial 38 a7 uF ev Electrolytic/Radial 39 470 uF 25v Electrolytic/Radial C40 Tue 16 Electrolytic/Radial cal 0.33 uF Sov Electrolytic/Radial ca2 a7 uF 10y Electrolytic/Radial £43 O.1 ut | As Issue 5 | S0v,-20x1908 cas Ol uF SOV, -208+80% cas Vo oak 2% Ceramic a6 1 uF 50V, -20%+80% ca7 22 uF 16v Electrolytic/Radial cae 0,01 uF 20% Ceramic/T8 53 NOT USED | 22 pF 5% Ceramic nci-29 | 0.1 uF 0.1 uF SOV, -20%+80% 5.6TABLE 5.5 FINAL BOARD ASSEMBLY (contd) Tireuie aia Ref __ ISSUE 5 ISSUE 6 teers ae meme RESISTORS a1-R6 3k3 5%, 1/4 87 320R 5x, 1/ai RB ar 5k L/did 29 3k3 54, 1/4W R10 6808 5h, 1/4M Ril tk 54, 1/4 R12 3k9 52, i/4N R13 10k Sh. 1/4M R14 a7 54, 1/4 R15 330R avy) RIS 330R 5%, 1/4 R17-28 10k 5u, 1/4M R25 1808 Se, L/aw R26 343 5h. 1/4u R27 343 5, 1/40 naa ik 54. 1/4 829 Ik 5K, 1/4W R32 820 5, 1/4 833 820R As Issue 5 5k, 1/4W R46 ik 54, 1/4 Ray zee Bu, 1/4N Rae 8k? 5, 1/4W RaQ 8k2 Su, 1/4W R50 a2 54, 1/4W R51 1k 5, 1/4W R52 ik 6) 1/4 R53 Ik 54. 1/aw Re a7k a 1%, 1/4 R55 2k2 16; 1/40 R56 6x8 a, 1/4 R57 lk 58. 1/4W R5B 5k6 5% 1/4W R59 22k 6 1/4 61 15k St, 1/4 R62-69 343 5, 1/4W R70 i" 54) 1/4H a7 2k2 5, 1/4W R72-79 33R 5%, 1/8H Ra0 154 0.8 R35 yo0R 5h, 1/4H R86 2708 se, Law 5.7TABLE 5.5 FINAL BOARD ASSEMBLY (contd) Tircult Ratinay_|Manufacturer7 Ref ISSUE 5 issue 6 _| Notes % Tol Type RESISTORS Re? tk it, 1/4 pen 752 S75 1/4W rea Ik 5a, 1/4 R90 Ik 55, 1/4 ROL ark 5x, 1/4 Ree 3908 @) 5%, 1/4 R93 3x3 As 52, 1/4 33 Issue 5 5%, 1/4W lk 5x, 1/ait 22 5%, 1/8 lk 1/4 447 52, 1/4H 22 58, 1/4W R102 33k ZERO 9 (2) %, 1/4 2103 33k 7FR0 0 (7) 5g, 17d R104 a2R aR (2) 5, 1/4 R108 Ik lk (2) 5%, 1/4M R106 rt 1k (2) 1/4 UL-6 ZERO 2 - @) D1ovEs o1-017 | marae 020 Loz3sr RED LED SIFAM bal Loz3sr, RED LED SIFAM 025 BAIS? 026 BAIS? 27 Lo235y YELLOW LED | STFA 028 ing1aa as 029 14148 Issue 5 TRANSISTORS TRI BC184 (4) TR? ITK510/ BSK29-S6g TR3 BC184 (4) TR4 BC 184 (4) TRS aC 184 (4) 5.8TABLE 5.5 FINAL BOARD ASSEMBLY (contd) Circuit amen Tanufacturer) Ref ISSUE 5 ISSUE 6 Type TRANSISTORS (contd) TRO 2TX551 TR7 27x551 TRB 77x313/ Mps2369 As TRS 27X313/ Issue §PS2369 INTEGRATED CIRCUITS Icl-16 | 114864 P2 Hitachi TMS4164-1 5H Texas HCHE66SAPI5 Motorola MK4564N15 Alternatives | Hostek UPD4164¢ -3 NEC MSM3764-15RS, OKI 1H34146-12nL Texas HYB4164P280 SIE Ici? | 74Ls00 () Icis__ | Nc6ao08 Hotorola 1€19, 20 | 74LS257 as NOT Nat . Semi teat” | 74Ls245 Issue 5 NOT Hat. Semi 122 | 7x8301 Plessey/Sinclair 123 | Zxe302 NCK/Sinclair 1c2a— | 049 NEC 1c25 | 1488 o 1c26 | 14898 = 127 | 74Ls03 . . 1c2g | M1377 Nc1377P Motorola 1033 (2) 32k ROM, JM Mask 1c3¢— | 23128 23128 (2) 16k ROK, JM Mask 136 | 79L12 79L12 -12V Regulator 1037 | 7eL12 7aLl2 +12 Regul ator 138 | - HALIELS (6) Sinclair CONNECTORS a 64-way Viking, Euro connector. A/B a2 30-way Edge connector 93,4 | 603A LH As BICC, BT type 05,6 | 603A RH Issue 5 BICC, BT type a7 Jack a-pin DIN a8 3-pin Skt | Phillips, Mains 5.9TABLE 5.5 FINAL BOARD ASSEMBLY (contd) Tircurt Rating? Panufacturer Ref ISSUE 5. ISSUE 6|tlotes | Tol Type CONNECTORS (contd) 39,10 | Jack Single pol, NC ou TESES/ 188, Beway flex a2 TELIFS/188 L-way flex upc /2 As 4 off Aries, 7-way Issue 5 Flex. socket ts MuP2P-1B, Burndy Leos | Mupep-18 Burndy (20,21, 027) MISCELLANEOUS COMPONENTS Te | S40pF - Trfinner mt us1233 Astox,€36 Modul ator} x HC18-U LSttHz ,20ppm x2 1X38 As 32. 768kH2,, 20pm 3 He1eT-u | Issue 5 4, 4336HHz , 20pm xa - LimHz ,10ppm 33 RESET Pye Schadow, OPCO Switch FOR SERVICE MANUALS: ‘CONTACT: MAURITRON TECHNICAL SERVICES www. [Link] TEL: 01844 - 351694 FAX: 01844 - 352554 5.10FIGURE 1.5 QL CIRCUIT DIAGRAM (Issue 6) 7.18FIGURE 1.4 QL CIRCUIT DIAGRAM (Issue 5) 1.17c — =——r — r x ra tae or 7 TRASISORS mh oy ee aT ater ar Bar totes on wy ews esis a ay a ‘a ie m Blue a mise sate a ar — = r —— mes & Tans Fa ro concurs resis camors mise Hinata?) why iain eeeasm xs0d-K607 Le ao FOR SERVICE MANUALS CONTACT: MAURITRON TECHNICAL SERVICES wow. [Link] TEL: 01844. 351694 FAX: 01844 - 352554 ” ares erworn so-as ager 1 asangaitJ FIGURE 1.3 QL BLOCK DIAGRAM 1.160 0 Es 0 0} fo il PA ut slim rte “i ti Je ls | i oes = Tele L {hl iiss gl aE ren si ' INAL PC BOARD I MOVI| MOV2 PRINTED CIRCUIT BOARD (Issue 5) FIGURE 5.1 COMPONENT LAYOUTMovt it Mov2 i PRINTED CIRCUIT BOARD (Issue 6) FIGURE 5.2 COMPONENT LAYOUT