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Computer Architecture MCQ Questions

This document contains a series of multiple choice questions about computer organization and architecture topics such as machine instructions, addressing modes, ALU, CPU control, I/O interfaces, pipelining, and memory. Each question is followed by possible answer choices and the submitted answer from Payal Preet or Raghu Garg. The questions cover topics like which addressing mode gives the operand explicitly, what a basic instruction contains, the bit storage capacity of a ROM, examples of internal memory, types of interrupts, when the Intel 80486 was introduced, register pairs that can be stored in memory directly, how pipelining is implemented, factors that impact pipelining performance, and dependencies that hurt pipelined processors.

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Kuldeep Kushwaha
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597 views2 pages

Computer Architecture MCQ Questions

This document contains a series of multiple choice questions about computer organization and architecture topics such as machine instructions, addressing modes, ALU, CPU control, I/O interfaces, pipelining, and memory. Each question is followed by possible answer choices and the submitted answer from Payal Preet or Raghu Garg. The questions cover topics like which addressing mode gives the operand explicitly, what a basic instruction contains, the bit storage capacity of a ROM, examples of internal memory, types of interrupts, when the Intel 80486 was introduced, register pairs that can be stored in memory directly, how pipelining is implemented, factors that impact pipelining performance, and dependencies that hurt pipelined processors.

Uploaded by

Kuldeep Kushwaha
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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9/28/13

Computer Organization and Architecture MCQ

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Computer Organization and Architecture MCQ


_____________________________________________________________________________________________________________________________
Machine Instructions and Addressing
Modes
ALU and Data-Path
CPU Control Design and Memory
Interface
I/O Interface (Interrupt and DMA
mode)
Instruction Pipelining and Cache
Main Memory and Secondary Storage

Show

In which addressing mode the operand is given explicitly in the instruction itself?
A.
B.
C.
D.

Absolute mode
Immediate mode
Indirect mode
Index mode

Submitted By Payal Preet


Answer B
_____________________________________________________________________________________
A basic instruction that can be interpreted by computer generally has
A.
B.
C.
D.

An operand and an address


A decoder and an accumulator
Sequence register and decoder
An address and decoder

Submitted By Payal Preet


Answer A
_____________________________________________________________________________________
What is the bit storage capacity of a ROM with a 512 4-organization?
A.
B.
C.
D.

2048
2049
2047
2046

Submitted By Payal Preet


Answer A
_____________________________________________________________________________________
Which of the following is the internal memory of the system?
A.
B.
C.
D.

CPU register
Cache
Main memory
All of these

Submitted By Payal Preet


Answer D
_____________________________________________________________________________________
Which of the following interrupt is non maskable
A.
B.
C.
D.

INTR
RST 7.5
RST 6.5
TRAP

Submitted By Payal Preet


Answer D
_____________________________________________________________________________________
Intel 80486 was introduced in
A.
B.
C.
D.

1985
1986
1987
1989

Submitted By Raghu Garg


Answer D
_____________________________________________________________________________________
Which of following register pair can be directly stored in memory?
A.
B.
C.
D.

BC
HI
CD
DE

Submitted By Raghu Garg


Answer A
_____________________________________________________________________________________
An instruction pipeline can be implemented by means of
A.
B.
C.
D.

LIFO buffer
FIFO buffer
Stack
None of the above

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9/28/13

Computer Organization and Architecture MCQ


Submitted By Payal Preet
Answer B
_____________________________________________________________________________________
The concept of pipelining is most effective in improving performance if the tasks being performed in
different stages
A. Require different amount of time
B. Require about the same amount of time
C. Require different amount of time with time difference between any two tasks being same
D. Require different amount with time difference between any two tasks being different
Submitted By Payal Preet
Answer B
_____________________________________________________________________________________
Performance of a pipelined processor suffers if
A. The pipeline stages have different delays
B. Consecutive instructions are dependent on each other
C. The pipeline stages share hardware resources
D. All of these
Submitted By Payal Preet
Answer D
_____________________________________________________________________________________
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