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Unit Test on Transistor Configurations

This document contains a unit test for an electronics and circuits class with 3 questions and multiple subparts. Question 1 asks to compare transistor configurations, draw the CB configuration circuit diagram and input characteristics, and explain the construction of an n-channel JFET. Question 2 contains parts to explain the construction and operation of an NPN transistor in the active region and describe the concept and plotting of a DC load line. Question 3 involves drawing and explaining the CE configuration, listing biasing circuit types and drawing a fixed bias circuit, and explaining the concept of a Q point on a DC load line.

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167 views1 page

Unit Test on Transistor Configurations

This document contains a unit test for an electronics and circuits class with 3 questions and multiple subparts. Question 1 asks to compare transistor configurations, draw the CB configuration circuit diagram and input characteristics, and explain the construction of an n-channel JFET. Question 2 contains parts to explain the construction and operation of an NPN transistor in the active region and describe the concept and plotting of a DC load line. Question 3 involves drawing and explaining the CE configuration, listing biasing circuit types and drawing a fixed bias circuit, and explaining the concept of a Q point on a DC load line.

Uploaded by

awasarevinayak
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

Unit Test 1

Class:-SY EJ

Electronic Devises and Circuit (17316)

25 Marks

Q.No.1)A]Answer the following. Compare the transistor configurations CB,CE & CC B] Answer any one. a) Draw the circuit diagram of CB configuration. Draw input characteristics. b) Draw and explain the construction of n-channel JFET.

(5M)

(4M)

Q.No.2) Solve any two. a) Explain the construction of NPN transistor with help of diagram. b) Explain the operation of NPN transistor in the active region.

(4M each)

c) Describe the concept of DC load line. Describe procedure to plot the DC load line.

Q. No.3) Solve any two. a) Draw the circuit diagram of CE and explain in brief. b) List the types of biasing circuit and draw the fixed bias circuit.

(4M each)

c) Explain the concept of Q point for biasing circuit. Show different operating points on DC load line.

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