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BITS Pilani: Digital Signal Processing

The document discusses a digital signal processing class that covers the architecture of the TMS 320 6713 digital signal processor. Specifically, it notes that the processor runs at 255 MHz, can execute 8 instructions per cycle, and is capable of running up to 1.8 billion instructions per second. It also mentions the TMS320C6713 has line in/out and mic in/HP out ports to handle audio signals at various sampling rates, and its on-chip memory can be extended up to 4GB.

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Neha Pachauri
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59 views17 pages

BITS Pilani: Digital Signal Processing

The document discusses a digital signal processing class that covers the architecture of the TMS 320 6713 digital signal processor. Specifically, it notes that the processor runs at 255 MHz, can execute 8 instructions per cycle, and is capable of running up to 1.8 billion instructions per second. It also mentions the TMS320C6713 has line in/out and mic in/HP out ports to handle audio signals at various sampling rates, and its on-chip memory can be extended up to 4GB.

Uploaded by

Neha Pachauri
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Digital Signal Processing

BITS Pilani
Pilani|Dubai|Goa|Hyderabad

Date : 06/09/2013

BITS Pilani
Pilani|Dubai|Goa|Hyderabad

Previous class:
Architecture of TMS 320 6713

BITS Pilani
Pilani|Dubai|Goa|Hyderabad

Today class
Architecture of TMS 320 6713

TMS320C6713 DSP Processor


255 MHz processor What is the clock cycle? 4.44 nsec It has VLIW architecture capable of running 8 instructions per cycle. How many instructions can be executed per sec? 8 * 255 = 1800 million instructions per second

Line in and line out for audio signal Mic in and HP out are for stereo signal Sampling rate can be 8, 16, 24, 32, 44.1, 48 and 96 KHz

Self test program is stored in FLASH memory The memory can be extended up to 4GB.

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