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ASIC Design Lab Exercise

This document instructs students to use LEDIT software to perform Design Rule Checks on integrated circuit layouts for a 2-input NAND gate and a 2-input NOR gate. Students are asked to write a discussion and conclusion based on the results and submit their work in hardcopy at the next lab session.
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0% found this document useful (0 votes)
66 views1 page

ASIC Design Lab Exercise

This document instructs students to use LEDIT software to perform Design Rule Checks on integrated circuit layouts for a 2-input NAND gate and a 2-input NOR gate. Students are asked to write a discussion and conclusion based on the results and submit their work in hardcopy at the next lab session.
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd

INTEGRATED CIRCUIT DESIGN LABORATORY EXERCISE ASIC 2 Exercise Using LEDIT, make Design Rule Check for these

layout: a. 2 i/p Layout for NAND and b. 2 i/p NOR. Write discussion & conclusion from these layouts. Submit in hardcopy on the next lab session.

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