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Figure from:Towards Fully Reconfigurable Multimedia Platforms

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The next figure shows the first board, designed for synthesis and testing of individual multimedia components and other peripheral modules, such as video composition and I/O interfaces. Figure 5-1 Digital SET TOP BOX I — Module Synthesis/Testing board
The next figure shows the first board, designed for synthesis and testing of individual multimedia components and other peripheral modules, such as video composition and I/O interfaces. Figure 5-1 Digital SET TOP BOX I — Module Synthesis/Testing board
Figure 5.2 (below) shows the microprocessor internal organization proposed for the “web box” platform, which will incorporate an extremely reduced core web browser application and email facilities written in Z-80 compatible instruction set [Zilog].
Figure 5.2 (below) shows the microprocessor internal organization proposed for the “web box” platform, which will incorporate an extremely reduced core web browser application and email facilities written in Z-80 compatible instruction set [Zilog].
The following figure shows the multi-scalar architecture proposed. Figure 5-4— Multi-Scalar Architecture
The following figure shows the multi-scalar architecture proposed. Figure 5-4— Multi-Scalar Architecture