In recent years, 2.5D chiplet package designs have gained popularity in system integration of heterogeneous technologies. Currently, there exists no standard CAD flow that can design, analyze, and optimize a complete heterogeneous 2.5D... more
The proposed factorization methods for regular arrays of two-input cells have several important advantages over the existing logic representations and methodologies: (1) The logic representation and design implementation are consistent.... more
The physical design placement problem is one of the hardest and most important problems in micro chips production. The placement defines how to place the electrical components on the chip. We consider the problem as a combinatorial... more
The energy-efficient, easy-to-use microprocessors in the ARM Cortex-M series have received a large amount of attention recently as portable and wireless/ embedded applications have gained market share. In high-performance designs, power... more
A mathematical model for a nickel/hydrogen cell is developed to investigate the dynamic performance of the cell's charge and discharge processes. Concentrated solution theory and the volume averaging technique are used to characterize the... more
True critical path identification is still an issue of relevant importance in the physical design of CMOS VLSI circuits. Although delay enumeration-based timing analysis methods are independent of the number of long false paths, they are... more
The automation of the design of electronic systems and circuits [electronic design automation (EDA)] has a history of strong innovation. The EDA business has profoundly influenced the integrated circuit (IC) business and vice-versa. This... more
The automation of the design of electronic systems and circuits [electronic design automation (EDA)] has a history of strong innovation. The EDA business has profoundly influenced the integrated circuit (IC) business and vice-versa. This... more
This paper presents a methodology with which aircraft designs can be modified such that they produce optimal sound signatures on the ground. With optimal sound it is implied in this case sounds that are perceived as less annoying by... more
DELPHI (DEtector with Lepton, Photon and Hadron Identication) is a detector for e + e physics, designed to provide high granularity o v er a 4 solid angle, allowing an eective particle identication. It has been operating at the LEP (Large... more
In interconnect-dominated designs, the ability to minimize layout-induced parasitic effects is crucial for rapid design closure. Deep sub-micron effects and ubiquitous interference in mixed-signal environments cause designers to be less... more
Tall residential buildings as a demographic solution for vertical development and creating diverse housing were a response to population growth in cities that arose following modern Western architecture. This research is aimed at... more
The Low-Energy Undulator Test Line (LEUTL) freeelectron laser (FEL) [1] at the Advanced Photon Source (APS) has achieved gain at 530 nm with an electron beam current of about 100 A . In order to push to 120 nm and beyond, we have designed... more
State-of-the-art FPGA architectures have millions of gates in CLBs, Block RAMs, and Multiplier blocks which can host fairly large designs. While their physical design calls for oorplanning, the traditional algorithm for ASIC do not suf... more
In-Place Optimization (IPO) has become the backend methodology of choice to resolve the gap between logic synthesis and physical design as the optimization can be guided by accurate physical information. To perform optimization without... more
Timing convergence problem arises when the estimations made during logic synthesis can not be met during physical design. In this paper, an efficient rewiring engine is proposed to explore maximal freedom after placement. The most... more
This paper describes a new visual approach to creating and manipulating symbolic descriptions of VLSI microarchitectures at the register-transfer (RT) level. The MIES visual RT description provides a number of views of a... more
Long-term care settings are at the center of strongly debated approaches to policies that shape the delivery of care and operational practices. There is advocacy for transformational change within these settings to support a... more
In this new technology era, circuit partitioning is a fundamental problem in very large-scale integration (VLSI) physical design automation. In this brief, we present a new interconnection oriented clustering algorithm for combinational... more
In this new technology era, circuit partitioning is a fundamental problem in very large-scale integration (VLSI) physical design automation. In this brief, we present a new interconnection oriented clustering algorithm for combinational... more
In this new technology era, circuit partitioning is a fundamental problem in very large-scale integration (VLSI) physical design automation. In this brief, we present a new interconnection oriented clustering algorithm for combinational... more
DELPHI (DEtector with Lepton, Photon and Hadron Identification) is a detector for e+e-physics, designed to provide high granularity over a 47r solid angle, allowing an effective particle identification. It has been operating at the LEP... more
There are many methods for the synthesis of logical functions. All these methods can be divided into two classes the first one is Two-Level Logic Synthesis and the second one is Multi-Level Logic Synthesis. The multi-level circuits and... more
Voltage islands enable core-level power optimization for Systemon-Chip (SoC) designs by utilizing a unique supply voltage for each core. Architecting voltage islands involves island partition creation, voltage level assignment and... more
Despite the recent academic efforts to develop Electronic Design Automation (EDA) algorithms for 3D ICs, the current market does not have commercial 3D computer-aided design (CAD) tools. Instead pseudo-3D alternative design flows have... more
Hierarchical very-large-scale integration (VLSI) flows are an understudied yet critical approach to achieving design closure at giga-scale complexity and gigahertz frequency targets. This paper proposes a novel hierarchical physical... more
Interdie coupling in face-to-face-bonded threedimensional (3-D) ICs is becoming increasingly important for power and signal integrity. For the first time, we conduct a comprehensive study of the coupling impact in all three aspects:... more
In 3D integrated circuits, through-silicon-vias (TSVs) are used to connect different dies stacked on top of each other. These TSVs occupy significant silicon area and are many times larger than gates. Depending on the fabrication... more
System-On-Package (SOP) technology provides a capability to integrate both mixed-signal active components and passive components all into a single high speed/density three dimensional packaging substrate. The physical layout resource of... more
In this paper we present a test structure and design methodology for testing, characterization, and self-repair of TSVs in 3D ICs. The proposed structure can detect the signal degradation through TSVs due to resistive shorts and... more
We propose a self-contained, flat, forcedirected algorithm for global placement that is simpler than existing placers and easier to integrate into timingclosure flows. It maintains lower-bound and upper-bound placements that converge to a... more
Digital system designs are the product of valuable effort and know-how. Their embodiments, from software and hardware description language program down to device-level netlist and mask data, represent carefully guarded intellectual... more
Given a hyperedge-and vertex-weighted hypergraph H=(V, E), a k-way partitioning of V assigns the vertices to k disjoint nonempty partitions. The k-way partitioning problem seeks to minimize a given cost function c (Pk) whose arguments are... more
The development of EDA tools is driven by the desire to find near-optimal solutions for circuits of increasing size. However, quantifying sub-optimality and scalability of optimization heuristics is non-trivial. We follow related... more
The present B-factories PEP-II and KEKB have reached luminosities of 3-4x10 33 /cm 2 /s and delivered integrated luminosity at rates in excess of 4fb-1 per month [1,2]. The recent turn on of these two B-Factories has shown that modern... more
The internafional clock ensemble, which contributes to the generation of International Atomic T h e (TAI and UTC), has improved d r d c d y over the last few years. The main change has been the introduction o f a significant number of HP... more
The international clock ensemble, which contributes to the generation of International Atomic Time (TAI and UTC), has improved dramatically over the last few years. The main change has been the introduction of a significant number of HP... more
It is well-known that fine tuning in database physical design is an important strategy for speeding up data access. In this paper, we introduce a new approach, denoted HypoPlans, to make relational database systems able to execute... more
Modern very large-scale integration (VLSI) designs typically use a lot of macros (RAM, ROM, IP) that occupy a large portion of the core area. Also, macro placement being an early stage of the physical design flow, followed by standard... more
The gap between VLSI technology and fabrication technology leads to strong refractive effects in lithography. Consequently, it is a huge challenge to reliably print layout features on wafers. The quality and robustness of lithography... more
| Experimental data describing circuit and physical design issues that in uence the noise immunity of digital latches in mixed-signal smart power circuits are described and discussed. The principal result of this paper is the... more
Given a 16-bit or 32-bit overclocked ripple-carry adder, we minimize error by allocating multiple supply voltages to the gates. We solve the error minimization problem for a fixed energy budget using a binned geometric program solution... more