For low-cost isolated ac/dc power converters adopting high-voltage dc-link, research efforts focus on single-stage multilevel topologies. This paper proposes a new single-stage three-level isolated ac/dc PFC converter for high dc-link... more
We present the design, architecture and experimental results of the low jitter Clock and Data Recovery (CDR) and Phase Locked Loop (PLL) circuit in the Low-Power Gigabit Transceiver (lpGBT) ASIC. This circuit includes a low noise... more
This paper discusses the extraction of power system harmonics using digital signal processing (DSP) techniques. Harmonics are integral multiples of a fundamental frequency and result from non-linear electrical loads, affecting voltage and... more
-This paper presents a third-order elliptic low-pass continuous-time filter with a 4-MHz cutoff frequency, integrated in a 3-pm p-well CMOS process. The design procedure is based on the direct simulation of a doubly terminated LC ladder... more
In this paper, we consider nonlinear dynamics of a control circuit called phase-locked loop and provide a rigorous mathematical analysis to establish conditions under which the lock-in, pull-in, and hold-in ranges, which correspond to... more
Nowadays, various types of phase-locked loops (PLLs) are used for synchronization of signals in modern electronic, electromechanical, and electrical systems. Nonlinear study of PLL models allows evaluation of the circuit's parameters at... more
In the present work, a second-order type-2 phase-locked loop (PLL) with a piecewise-linear phase detector characteristic is analyzed. An exact solution to the Gardner problem on the lockin range is obtained for the considered model. The... more
Methods of nonlinear analysis and synthesis of synchronization control systems for electrical grids have been developed. The use of averaging methods and Lyapunov-type stability criteria for the cylindrical phase space have made it... more
This paper shows the possibilities of solving the Gardner problem of determining the lock-in range for multidimensional phase-locked loop models. Analytical estimates of the lock-in range for a third-order system are obtained for the... more
This paper describes a 16-Gb/s differential bidirectional I/O transceiver cell in an emulated 40nm DRAM process that has a fan-out of four inverter delay (FO4) of 45ps, resulting in a bit time that is only 1.4 FO4 delays long. The... more
The aim of this paper is to explore the use of various current mode control (CMC) techniques to design a single phase grid tie inverter integrated with anti-islanding protection. Three types of CMC techniques have been discussed, namely... more
Con las técnicas actuales de reconocimiento facial, es posible descubrir automáticamente las emociones de una persona a través de una imagen de su rostro. Este estudio se vale de una aplicación en línea para detectar algunos puntos de... more
Resumen Con las tecnicas actuales de reconocimiento facial, es posible descubrir automaticamente las emociones de una persona a traves de una imagen de su rostro. Este estudio se vale de una aplicacion en linea para detectar algunos... more
The present paper proposes a combined voltage-oriented control and direct power control (VOC-DPC) method associated with the backstepping control technique for a three-phase four-wire grid-connected four-leg rectifier in the synchronous... more
A Phase-Locked Loop Model of the Response of the Postural Control System to Periodic Platform Motion
A phase-locked loop (PLL) model of the response of the postural control system to periodic platform motion is proposed. The PLL model is based on the hypothesis that quiet standing (QS) postural sway can be characterized as a weak... more
This paper proposes a simple and effective control technique for interconnection of DG resources to the power grid via interfacing converters based on Phase locked loop (PLL) and Droop control. The behaviour of a Microgrid (MG) system... more
Some U W B receivers, digiially oriented, sample the RF signal at a very high fmquenq close to 20 GHz. In that case, the phase noise and jitter performances of the clock synthesizer which contmls the sampling process are crucial. This... more
This paper provides analysis of output capacitor effects to phase stability of a hysteretic mode controlled buck converter. The hysteretic control method is a simple and fast control technique for switched-mode converters, but the... more
A highly digital two-stage fractional-N PLL architecture utilizing a first order 1-bit frequency-to-digital converter (FDC) is proposed and implemented in 65 nm CMOS process. Performance of the first order 1-bit FDC is improved by using a... more
Phase noise performance of ring oscillator based digital fractional-N phase locked loops (FNPLLs) is severely compromised by conflictin bandwidth requirements to simultaneously suppress oscillator phase and quantization noise introduced... more
A phase interpolator (PI) based fractional divider is used to improve the quantization noise shaping properties of a 1-bit ∆Σ frequency-to-digital converter (FDC). Fabricated in 65nm CMOS process, the prototype calibration-free... more
A digital fractional-N PLL that employs a high resolution TDC and a truly fractional divider to achieve low in-band noise with a wide bandwidth is presented. The fractional divider employs a digital-to-time converter (DTC) to cancel out... more
A calibration-free ring oscillator based fractional-N clock multiplier using hybrid phase/current-mode phase interpolator is presented. Fabricated in 65nm CMOS process, the prototype generates fractional frequencies from... more
A digital fractional-N PLL that employs a time amplifier based TDC and a truly fractional divider to achieve low in-band noise with a wide bandwidth of 3MHz is presented. Fabricated in 65nm CMOS process, the prototype PLL consumes 3.7mW... more
Network-On-Chip (NoC) is used as a main part of a system. NoC overcomes traditional System-On-Chip (SoC) problems. Because, SoC has problems like cost, design risk, more complexity and more power consumption. In software part, Xilinx ISE... more
The integration of solar photovoltaic (PV) systems and utility grids has gradually gained significant interest in improving the sustainability of clean power supply for society. However, power quality remains a challenge due to partial... more
We experimentally demonstrate, for the first time, the photonic generation of a continuous tunable THz wireless signal based on using optical phase locked loop (OPLL) subsystem and optical frequency comb (OFC). The OPLL is employed to... more
This paper presents a multiphase PLL designed for a 10%10 Gb/s serial link bundle that is based on a digital CDR receiver. The PLL was fabricated in a 90-nm SOI CMOS process and covers a frequency band of 9.6-12.8 GHz at a supply voltage... more
A wideband LC PLL in 45-nm SOI CMOS technology is presented that has a center frequency of 12.4 GHz and 1.2 octave locking range. The wideband operation is achieved by switching mutual inductances within the inductor coil of the LC... more
In the present-day decade, the world has regarded an expansion in the use of non-linear loads. These a lot draw harmonic non-sinusoidal currents and voltages in the connection factor with the utility and distribute them with the useful... more
A PV three-phase grid following inverter (GFI) with LCL filters can reduce current harmonics and deliver active power to the grid. Controlling such higher-order systems is challenging due to system uncertainties, grid voltage variations,... more
We report on the experimental demonstration of a chip-scale microresonator comb enabled optical frequency synthesizer using an agile and highly-integrated heterodyne optical phase-locked loop with InP-based photonic integrated circuit and... more
This study presents the design of a fully integrated fractional-N phase-locked loop (FNPLL) for the Global Navigation Satellite System (GNSS) applications. A new linearisation technique is presented for a charge pump (CP) circuit to... more
Active damped LCL-filter-based inverters have been widely used for grid-connected distributed generation (DG) systems. In weak grids, however, the phase-locked loop (PLL) dynamics may detrimentally affect the stability of grid-connected... more
Active damped LCL-filter-based inverters have been widely used for grid-connected distributed generation (DG) systems. In weak grids, however, the phase-locked loop (PLL) dynamics may detrimentally affect the stability of grid-connected... more
The paper investigates the Static Synchronous Compensator (STATCOM) stability enhancement. Two major factors of the STATCOM instability, power system strength and PhaseLocked Loop (PLL) delay, are analyzed theocratically as well as by... more
Here research portrays the execution as well as activity highlights for a "Phase-Locked Loop" ("PLL") engineering established frequency synthesizer for clock age also, computerized schemes running. From a programmed design, seeing an... more
The article suggests employing second-order sliding mode control (SOSMC) to manage photovoltaic systems (PVS) connected to the electrical grid. These systems face complexities due to non-linearities, variability, uncertainties,... more
A new adaptive back-stepping mode feedback linearisation (FBL) control strategy for both the rotor-side and the grid-side converter of the doubly fed induction generator (DFIG) has been proposed in this paper. As the control variables... more
Wind power is one of the most promising renewable energy sources. Due to a constantly increasing penetration rate in power grids in order to comply with interconnection requirements. This article targets the impact of a permanent magnet... more
Wind power is one of the most promising renewable energy sources. Due to a constantly increasing penetration rate in power grids in order to comply with interconnection requirements. This article targets the impact of a permanent magnet... more
The design of a phase-locked loop (PLL)-based proportional integral (PI) controller for improving the spiral scanning of a piezoelectric tube scanner (PTS), used in an atomic force microscope (AFM), is demonstrated in this paper. Spiral... more
The objective of this paper is to develop a new design of a voltage controlled microwave oscillator by using the method of negative resistance in order to fabricate VCO with very good performance in terms of tuning rang, phase noise,... more
Wind and photovoltaic power plants connected to weak grids can bring stability problems. The grid-connected inverter is an important connection port between the renewable energy and the grid. Some studies have indicated that the... more
The rapidly growing dispersion of distributed generation systems into the utility grid needs appropriate control techniques to stay interconnected even under abnormal and distorted grid conditions to ensure the overall grid stability. To... more
In last two decades the use of renewable sources has been increased tremendously. This has increased the number of inverters connected to grid for the integration of energy from renewable sources. The stability of grid tied inverter is... more