IP management

Tapping into the creativity of a crowd can provide a highly efficient and effective means of acquiring ideas, work, and content to solve problems. But crowdsourcing solutions can also come with risks, including the legal risks associated with intellectual property. Therefore, we raise and address a two-part question: Why–—and how–—should organizations deal with intellectual property issues when engaging in the crowdsourcing of solutions? The answers lie in understanding the approaches for acquiring sufficient intellectual property from a crowd and limiting the risks of using that intellectual property. Herein, we discuss the hazards of not considering these legal issues and explain how managers can use appropriate terms and conditions to balance and mitigate the risks associated with soliciting solutions from a crowd. Based on differences in how organizations acquire intellectual property and limit associated risks, we identify and illustrate with examples four approaches for managing intellectual property (passive, possessive, persuasive, and prudent) when crowdsourcing solutions. We conclude with recommendations for how organizations should use and tailor the approaches in our framework to source intellectual property from a crowd.

NBTI (Negative Bias Temperature Instability) has emerged as the dominant PMOS device failure mechanism for sub-100nm VLSI designs. There is little research to quantify its impact on skew of clock trees. This paper demonstrates a mathematical framework to compute the impact of NBTI on gating-enabled clock tree considering their workload dependent temperature variation. Circuit design techniques are proposed to deal with NBTI induced clock skew by achieving balance in NBTI degradation of clock devices. Our technique achieves up-to 70% reduction in clock skew degradation with miniscule (<0.1%) power and area penalty.

IP-XACT is a well accepted standard for the exchange of IP components at Electronic System and Register Transfer Level. Still, the creation and manipulation of these descriptions at the XML level can be time-consuming and error-prone. In this paper, we show that the UML can be consistently applied as an efficient and comprehensible frontend for IP-XACT-based IP description and integration. For this, we present an IP-XACT UML profile that enables UML-based descriptions covering the same information as a corresponding IP-XACT description. This enables the automated generation of IP-XACT component and design descriptions from respective UML models. In particular, it also allows the integration of existing IPs with UML. To illustrate our approach, we present an application example based on the IBM PowerPC Evaluation Kit.

In this paper we present a policy-based architecture for aggregating (grooming) IP/MPLS flows (packet-based LSPs) within lightpaths taking into account the possibility of having to cope with further transport faults. The defined policies try to minimize the negative impact when a failure is detected in the optical transport network. Such policies deal with 1+1, 1:1 and 1:N schemes of protection. In our model, IP/MPLS flows are divided into High Priority (HP) and Low Priority (LP) traffics. The architecture is composed of an Admission Control responsible for receiving the requisitions from the IP/MPLS network and forward them to the Policy Manager which in turn is responsible for applying the policies. The architecture also has a Fault Manager responsible for accounting the failures and a Resource Manager responsible for managing the lightpaths. Our approach has been implemented to validate the policies and the results showed that the defined policies decrease the number of affected LSPs when a given lightpath fails.

Fast Handovers is an enhancement to the Mobile IPv6 protocol, currently specified in an IETF draft, which reduces the handover latency. This can be beneficial to real-time applications. This paper presents a novel implementation of Fast Handovers and an analysis of the handover. Using a real testbed we study the handover latency and the provided QoS: analyzing the OWD, IPDV and Packet Loss before and after the handover. Finally we present a comparison between the Mobile IPv6 and the Fast Handovers handover.

Parallel architectures have become an increasingly popular method in which to achieve high performance with low power consumption. In order to leverage these benefits, applications are decomposed into multiple computational modules (tasks) that collectively operate and communicate in parallel. In this paper, we present a scalable and highly parametric streams-based communication architecture for inter-module communication for FPGA-based systems-SCORES. This communication architecture improves on previous methods by providing increased application specialization and heterogeneous module clock frequencies, as well as providing a means for low latency communication and data throughput guarantees. I. INTRODUCTION AND MOTIVATION One of the most important design considerations in VLSI digital systems is achieving high performance with low power consumption. Parallel architectures provide a popular method in which to achieve these goals [6]. Parallel architectures enable application decomposition into multiple computing modules, operating and communicating in parallel and which collectively encompass entire application behavior. In order to exploit potential speedup as the number of modules increases, an efficient communication architecture to support inter-module communication is required. Traditional bus-based communication architectures enable all computing modules to communicate over a common shared bus, providing great flexibility for varying levels of inter-module communication requirements. However, bus-based communication architectures scale poorly as the number of computing modules increases [5]. This poor scalability results from shared transmission media contention and long routing wire delays, of which collectively imply long routing delays, reduced maximum clock frequency, and reduced throughput. In order to alleviate some of the bus-based communication architecture drawbacks, a Network-on-Chip (NoC) architecture was proposed as a paradigm for scalable and parallel communication architectures [3]. NoCs are constructed as a topology of networked nodes connected by physical communication links. Each computing module is attached to this topology via a networked node. Depending on the communication scheme used, networked nodes can be classified as routers (packet switching) or switches (circuit switching).

—The current system to manage the global pool of IP addresses is centralized in five transnational organizations, the Regional Internet Registries (RIRs). Each of these RIRs manage the address pool for a large number of countries. Because the RIRs are private organizations, they are subject to the legal framework of the country where they are based. This configuration results in a jurisdictional overflow from the legal framework of the countries where the RIR is based to all the countries that the RIRs are serving (the countries served by the RIRs de facto become subjects of the legal system of the country where the RIR is hosted). The situation is aggravated by the deployment of new security techniques such as the Resource Public Key Infrastructure (RPKI) and BGP security (BGPsec), that enable enforcement of allocations by the RIRs. In this paper we present InBlock, a blockchain-based distributed governance body aimed to provide decentralized management of IP addresses. InBlock also aims to fulfil the same objectives as the current IP address allocation system, namely, uniqueness, fairness, conservation, aggregation, registration and minimized overhead. InBlock is implemented as a Decentralized Autonomous Organization, i.e., as a set of blockchain's smart contracts in Ethereum. Any entity may request an allocation of addresses to the InBlock registry by solely performing a (crypto)currency transfer to the InBlock. The fee required, along with the annual renewal fee, serves as a mechanism to deter stockpiling and other wasteful practices. As with any novel technology, there are many open questions about the usage of blockchains to build an IP address registry. For this reason, we believe that practical experimentation is required in order to have hands-on experiences about such a system. We propose to conduct an experiment on distributed address management using InBlock as a starting point to inform future directions in this area.

This paper presents an accurate interconnect thermal model for analyzing the temperature distribution of an on-chip interconnect wire. The model addresses the ambient temperatures and the heat transfer rates of the packaging materials. Particularly, the model considers the effect of the interconnect temperature gradients. The paper employs an equivalent transmission line circuit to obtain the temperature distribution solution from the model. Then an O (n) algorithm is introduced to compute the interconnect temperatures. Experimental results demonstrate the accuracy of the thermal model, by comparisons with the computational fluid dynamics tool FLUENT.

The experience economy has taken popular culture and has injected it into every aspect of our lives. We translate movies, TV shows, video games, and other forms of entertainment into our daily activities in the form of fan fiction, events, merchandise, and themed establishments. These activities involve vast amounts of creative content protected by copyright, trademarks, and designs. Rightsholders need to manage these intellectual properties strategically to increase profits while tolerating consumer experiences that do not cause damage to the business. This preserves long-term fan loyalty and immersive patronage.

The (r)evolution of wireless access infrastructure can be described as the convergence of the available radio communication systems towards a harmonized, more flexible and reconfigurable access system to match the current and upcoming demands. In recent years Softwarization and Virtualization technologies have moved from server and network domains to wireless domain and provides new perspectives of managing mobile networks functionalities. This paper provides evolution of the mobile network architecture in Software Defined Networking (SDN) and virtualization context and realizes it through the use of distribution of gateway function approach. Key improvements with proposed approach are to support efficient mobility management in heterogeneous access environments, remove the chains of IP preservation and optimal data path management according to application needs. A functional setup validates and assays the proposed evolution in terms of inter-system handover preparation, interruption and completion time relative to control plane delay requirements of the 5G networks.