The Java Cryptography Architecture, JCA in short, was created to allow JCA-compliant cryptography providers to be plugged into a JCA-aware application at run time. This configurable feature makes JCA widely used and assures its success.... more
This research paper introduces an innovative method for ensuring the security of video communication by implementing a video encryption and decryption system based on FPGA technology. The suggested system effectively employs programmable... more
The rapid growth and increasing of information technology and computer network have caused that data transition in digital form is considered more and more. The main disturbance of owners and producers of digital products is to protect... more
This correspondence presents an analysis of the finite register length influence on the accuracy of results obtained by the time-frequency distributions (TFD's). In order to measure quality of the obtained results, the variance of the... more
The analog implementation of a phase-based technique for disparity estimation is discussed. This technique is based on the convolution of images with Gabor filters. The article shows that by replacing the Gaussian envelope with other... more
This paper describes an efficient hardware architecture of 2D-Scan-based-Wavelet watermarking for image and video. The potential application for this architecture includes broadcast monitoring of video sequences for High Definition... more
Hard mathematical problems are at the core of security arguments in cryptography. In this paper, we study mathematical generalizations of the famous Rubik's cube puzzle, namely the factorization, representation and balance problems in... more
DSerent fast Fourier transform (FFT) algorithms for hardware implementation have been considered. We propose an implementation whereby two radix-N1'2 passes are carried out in parallel and in which each N1'2-point transform is carried out... more
In this paper, we propose two FPGA-area allocation algorithms based on profiling results for reducing the impact on performance of dynamic reconfiguration overheads. The problem of FPGA-area allocation is presented as a 0-1 integer linear... more
The Smith-Waterman (SW) algorithm is one of the widely used algorithms for sequence alignment in computational biology. With the growing size of the sequence database, there is always a need for even faster implementation of SW. In this... more
In this paper, we present the compiler and OpenMP runtime library extensions needed to allow runtime decisions regarding area allocation on a reconfigurable platform in a multi application context. Using a strong interaction between the... more
Time-frequency domain signal processing of neural recordings, from high-density microelectrode arrays implanted in the cortex, is highly desired to ease the bandwidth bottleneck associated with data transfer to extra-cranial processing... more
The large amount of data generated by neuroprosthetic devices requires a high communication bandwidth for extra-cranial transmission, critically limiting the number and utility of wireless implantable applications. Discrete wavelet... more
Reconfigurable systems can offer the high spatial parallelism and fine-grained, bit-level resource control traditionally associated with hardware implementations, along with the flexibility and adaptability characteristic of software.... more
The on-chip network (NoC) is a fundamental component of Non Uniform Cache Architectures and may significantly affect the performance of the overall system. The analysis described in this work evaluates the performance sensitivity of a... more
Transactional Memory is a promising parallel programming model that addresses the programmability issues of lockbased applications using mechanisms that are transparent to developers. Hardware Transactional Memory (HTM) implements these... more
The objective of this paper is to design a new generation of affordable sophisticated data acquisition and processing (DAQP) systems. Because of the proposed system hardware reconfigurability, it can be used to meet the need of many... more
This paper presents mathematical derivations for a type of maximum-likelihood sequence detector (MLSD), for decoding signals equalized to the ternary partial response fundamental polynomials-duobinary (1 + ) and dicode (1 ); or part of... more
2010-current-andfuture-challenges/the-memory-game-creating-reactive-interruptible-turn-taking-human-robot-interaction-forasimo
Extracting only the visible portion of an isosurface can improve both the computation efficiency and the rendering speed. However, the visibility test overhead can be quite high for large scale data sets. In this paper, we present a... more
Stream ciphers are symmetric cryptosystems that rely on pseudorandom number generators (PRNGs) as a primary building block to generate a keystream. Stream ciphers have been extensively studied and many designs were proposed throughout the... more
In this paper, a parallel, power-efficient and scalable word-based crypto architecture is proposed that performs the operations required for scalar point multiplication including add, multiplication and inversion operations on GF(2 m )... more
This paper presents the dynamic hardware plugins (DHP) architecture for implementing multiple networking applications in hardware at programmable routers. By enabling multiple applications to be dynamically loaded into a single hardware... more
An inverse multiplexing method for irreducible polynomials is presented in this paper based on the theory of substitution boxes. The method is based on the theory of substitution boxes. Following a series of successful experiments, the... more
Thermal imagers operating in the 3-5 micron and 8-12 micron spectral bands require Automatic Gain Control (AGC) to enhance the visual detection and identification of targets against varying atmospheric conditions. In this paper, two... more
Fetal heart rate (FHR) monitoring is a proven means of assessing fetal health during the antenatal period. Currently, the only widely available instrumentation for producing these data is based on Doppler ultrasound, a technology that is... more
Fetal heart rate (FHR) monitoring is a proven means of assessing fetal health during the antenatal period. Currently, the only widely available instrumentation for producing these data is based on Doppler ultrasound, a technology that is... more
Modern graphics processing units (GPUs) can perform generalpurpose computations in addition to the native specialized graphics operations. Due to the highly parallel nature of graphics processing, the GPU has evolved into a many-core... more
In this paper, a hardware implementation of 802.16e-2005 Turbo encoder and decoder is presented with an efficient interleaver implementation and normalization scheme. The normalization scheme is based on rescaling, which results in area... more
In this paper we propose a new gradual noisy chaotic neural network (MP-NCNN) to solve the NP-complete attributed relational graph matching problem. These graphs are very important in pattern matching applications and the noisy chaotic... more
In remote monitoring of Electrocardiogram (ECG), it is very important to ensure that the diagnostic integrity of signals is not compromised by sensing artifacts and channel errors. It is also important for the sensors to be extremely... more
The cryptography is known as one of most essential ways for protecting information against threats. Among all encryption algorithms, stream ciphering can be indicated as a sample of swift ways for this purpose, in which, a generator is... more
In this paper we adapted a novel approach for accelerating the Smith-Waterman (S-W) algorithm using Recursive Variable Expansion (RVE), which exposes extra parallelism in the algorithm, as compared to any other technique. The results... more
In this paper, we present the compiler extensions, based on OpenMP libraries, needed for supporting parallel execution on the reconfigurable Molen platform. More specifically, we propose an ILP algorithm to map parallel applications on... more
We propose to use non-binary low density parity check (LDPC) codes for small packet transmissions in vehicle communications. Non-binary LDPC codes which are defined by a parity check matrix over non-binary Galois field GF(q) can achieve... more
In this paper, we propose a novel and efficient way to improve the computational complexity of the Elliptic Curve Cryptography [ECC] algorithm. ECC is a public key cryptography system, where the underlying calculations are performed over... more
The lattice Boltzmann method is an important technique for the numerical solution of partial differential equations because it has nearly ideal scalability on parallel computers for many applications. However, to achieve the scalability... more
This paper presents hardware (HW) architecture for fast parallel computation of Gray Level Cooccurrence Matrix (GLCM) in high throughput image analysis applications. GLCM has proven to be a powerful basis for use in texture... more
In this paper, we introduce the Wireless Open-Access Research Platform (WARP) developed at CMC lab, Rice University. WARP provides a scalable and configurable platform mainly designed to prototype wireless communication algorithms for... more
In this paper, we describe the design methodology and hardware implementation of a low-density parity-check (LDPC) code for a digital television (DTV) system. We begin the paper describing LDPC codes and the design strategies we used. We... more
The substitution box (S-box) component is the heart of the Advanced Encryption Standard (AES) algorithm. The S-box values are generated from the multiplicative inverse of Galois finite field GF(2 8) with an affine transform. There are... more
The Advanced Encryption Standard (AES) is the last standard for cryptography and has gained wide support as means to secure digital data. In this paper, Tradeoffs of speed vs. area that are inherent in the design of a security processor... more
We present a cortical-like strategy to obtain reliable estimates of the motions of objects in a scene toward/away from the observer (motion in depth), from local measurements of binocular parameters derived from direct comparison of the... more
Discrete wavelet transform (DWT) has been shown to provide exceptionally efficient data compression for neural records. This paper describes an area-power minimized hardware implementation of the lifting scheme for multi-level,... more