This paper presents two new high-speed low-power 1-bit full-adder cells using an alternative logic structure, and the logic styles DPL and SR-CPL. The adders were designed using electrical parameters of a 0.35µm Complementary... more
Moving towards nanometer scales, Quantum-dot Cellular Automata (QCA) technology emerged as a novel solution, which can be a suitable replacement for complementary metal-oxide-semiconductor (CMOS) technology. The 3-input majority function... more
The necessities to obtain better speed, this paper list to a change in parameter of full adder circuit that has been proposed by using 3T XOR gate combining CMOS with pass transistor logic. The design that has been given shows a... more
With the revolution in integrated circuits, great emphasis was given on performance and miniaturization. Speed, area and power became the main criterion upon which a VLSI system is measured in terms of its efficiency. In any VLSI system,... more
The low power and high speed fundamental building blocks are essential to construct arithmetic circuits. Three input Exclusive-OR(XOR) is presented here based on compound gate method. The high performance is achieved by reducing input... more
Full Adder (FA) circuits are integral components in the design of Arithmetic Logic Units (ALUs) of modern computing systems. Recently, there have been massive research interests in this area due to the growing need for low-power and... more
A full-swing high-speed hybrid Full Adder (FA) cell based on Gate Diffusion Input (GDI) technique and Conventional Complementary Metal-Oxide Semiconductor (CCMOS) logic has been proposed in this work. The design has been verified and... more
In digital processing techniques, the fundamental operations such as sum, division can be carried out by several categories of adders with different sum times, requirements of area and power consumption. The Residue number system (RNS)... more
The basic processes like addition, subtraction can be done using various types of binary adders with dissimilar addition times (delay), area and power consumption in any digital processing applications. To minimize the Power Delay Product... more
The basic processes like addition, subtraction can be done using various types of binary adders with dissimilar addition times (delay), area and power consumption in any digital processing applications. To minimize the Power Delay Product... more
In digital processing techniques, the fundamental operations such as sum, division can be carried out by several categories of adders with different sum times, requirements of area and power consumption. The Residue number system (RNS)... more
Full adder is one of the essential circuits among the various processing elements used in VLSI and other technologies circuits, because they are mainly employed in other arithmetic circuits, such as multi-digit adders, subtractors, and... more
A Smart antenna plays an important role in advanced wireless communication systems. One of the most important property of smart antenna is that it is capable of directing its main beam towards the direction of desired signal and forming... more
The growing market of mobile, battery-powered electronic systems demands the design of microelectronic circuits with low power dissipation. More generally, as density, size, and complexity of the chips continue to increase, the difficulty... more
Quantum-dot cellular automata (QCA) is an emerging technology with high integration density, low power consumption, and high operating speed. This study introduces a QCA-based modified content addressable memory (CAM) cell employing a... more
An extremely compact, all analog and fully parallel implementation of a class of shunting recurrent neural networks that is applicable to a wide variety of FET-based integration technologies is proposed. While the contrast enhancement,... more
Reversible logic concept gaining much attention of researchers due to its characteristics of generating loss-less system. Reversible logic technology do not erase information hence no heat dissipation. In this paper a new reversible SMT... more
1-bit full adder is a very great part in the design of application particular integrated circuits. Power consumption is one of the most significant parameters of full adders. Therefore reducing power consumption in full adders is very... more
This paper presents a novel low-power and high-speed 1-bit full-adder, which is designed based on pass transistor and TG logics. The main advantage of this design is low propagation delay and lowpower consumption, which leads to achieving... more
This paper presents a novel low-power and high-speed 1-bit full-adder, which is designed based on pass transistor and TG logics. The main advantage of this design is low propagation delay and lowpower consumption, which leads to achieving... more
A multiplier is one of the most important building block that is widely used in processor, embedded, VLSI applications, Application specific integrated circuits and most of the DSP applications. The three main thrust parameters of any... more
The digital logic circuits are restricted for the requirement of interconnections. This difficulty overcomes by using a big set of signals over the same chip area. Multiple-valued logic (MVL) designs contain more importance from that... more
The Quantum effects instigate to dominate device recital when transistor geometries are abridged. Sometimes, transistors refrain to have the properties that mark them beneficial for computational designs. With the intention of keeping... more
The Quantum effects instigate to dominate device recital when transistor geometries are abridged. Sometimes, transistors refrain to have the properties that mark them beneficial for computational designs. With the intention of keeping... more
Quantum-dot cellular automata (QCA) are promising models in nanotechnology based on the single electron effects of quantum dots and molecules. The present study designs and simulates the basic elements or Combinational circuit. A 2-to-4... more
This paper presents a performance analysis of reversible, fault tolerant VLSI implementations of carry select and hybrid decimal adders suitable for multi-digit BCD addition. The designs enable partial parallel processing of all digits... more
Controllable-polarity silicon nanowire transistors (CP-SiNWFETs) are among the promising candidates to complement or even replace the current CMOS technology in the near future. Polarity control is a desirable property that allows the... more
Over the past decade, several adiabatic logic styles have been reported. This paper deals with the design of a 1-bit full adder using several adiabatic logic styles, which are derived from static CMOS logic, without a large change. The... more
Traditionally, binary decision diagram (BDD)-based algorithms are used to synthesize binary logic functions. A BDD can be transformed into circuit implementation by replacing each node in the BDD with a 2:1 multiplexer. Similarly, a... more
Quantum-dot fabrication and characterization is a well-established technology, which is used in photonics, quantum optics and nanoelectronics. Four quantum-dots placed at the corners of a square form a unit cell, which can hold a bit of... more
In this paper a new full adder (FA) circuit optimized for ultra low power operation is proposed. The circuit is based on modified XOR gates operated in the subthreshold region to minimize the power consumption. Simulated results using... more
This paper presents the design of low voltage low power 10T full adder with minimum leakage power, and its transient analysis with cadence tools. Adder is the basic building block of Arithmetic in digital circuits, the area and power... more
We have defined a new method for automatic construction of reversible logic circuits by using the genetic programming approach. The choice of the gate library is 100% dynamic. The algorithm is capable of accepting all possible... more
Quantum Dot Cellular Automata (QCA) is a new paradigm in Nanotechnology that has grown much interest in the past few years. As the digital circuit’s dimension have been reducing at a fast pace, basic components of a CMOS based transistor... more
Background and Objectives: In recent decades, due to the effect of the short channel, the use of CMOS transistors in the nanoscale has become a major concern. One option to deal with this issue is the use of nano-transistors. Methods:... more
Gene regulation refers to a number of sequential processes, the most well-known and understood being translation and transcription, which control the level of a gene’s expression and ultimately result with specific quantity of a target... more
This study is to improve image data compression performance based on variable block-size quadtree image segmentation applied to double predictor differential pulse code modulation (DP–DPCM) image compressive algorithm. The quadtree... more
This paper describes the use of bioinspired strategies in the design of a digital circuit, which implements a full adder with carry input on a programmable logic device, as well as presenting the development of an experimental evolvable... more
This paper focuses on the production testing of Memristor Ratioed Logic (MRL) gates. MRL is a family that uses memristors along with CMOS inverters to design logic gates. Two-input NAND and NOR gates are investigated using the stuck at... more
Highlights • Fault tolerance analysis of various XOR gates against single cell addition and missing defects. • Highly fault tolerant XOR is used to design four Fingerprint Authentication Systems in QCA. • Energy dissipation analysis of... more
Thanks to its non-volatility, high write/sense speed and small size, Magnetic Tunnel Junction (MTJ) is under investigation to be integrated in the future reconfigurable computing circuits offering higher power efficiency and performance.... more
The demand for portable consumer electronics products is increasing at extremely high rate in recent years; therefore development of low-power VLSI circuits is essential. To achieve this objective a lot of innovative work has been done in... more
Continued dimensional scaling of CMOS processes is approaching fundamental limits and therefore, alternate new devices and microarchitectures are explored to address the growing need of area scaling and performance gain. New... more
Power dissipation is an integral part of CMOS VLSI circuit design to optimize the battery and externally powered applications in embedded computing. With advances in new capabilities in related domains, new design mechanisms have evolved... more
As the sizes of (nano-)devices are aggressively scaled deep into the nanometer range, the design and manufacturing of future (nano-)circuits will become extremely complex and inevitably will introduce more defects while their functioning... more
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Quantum-dot cellular automata (QCA) nanotechnology is a practical suggestion for replacing present silicon-based technologies. It provides many benefits, such as low power usage, high velocity, and an extreme density of logic functions on... more