Nowadays, the techniques based on the use of artificial neural networks are instigating increasing interest in the fields of control and robotics. The rapidity of processing, the ability to learn and adapt as well as the robustness of... more
The main objective of this paper is to detail the development of a feasible hardware design based on Evolutionary Algorithms (EAs) to determine flight path planning for Unmanned Aerial Vehicles (UAVs) navigating terrain with obstacle... more
This manuscript presents the design and implementation of an intellectual property core, which acts as a generator of nuclear pulses. The design is embedded in a Field programmable gate array. It is capable of forming pulses with an... more
Detailed submarine digital analysis of side scan sonar images significantly enhances the ability to assess seafloor features and artifacts digital images. These images are usually poor in their resolution if they are compared with optical... more
This paper presents a direct method of reducing convolution processing time using hardware computing and implementations of discrete linear convolution of two finite length sequences (NXN). This implementation method is realized by... more
A high speed processor depends greatly on the multiplier as it is one of the key hardware blocks in most digital signal processing systems as well as in general processors. This paper presents the performance analysis of vedic multiplier... more
C-slow retiming is a process of automatically increasing the throughput of a design by enabling fine grained pipelining of problems with feedback loops. This transformation is especially appropriate when applied to FPGA designs because of... more
Parallel computing using accelerators has gained widespread research attention in the past few years. In particular, using GPUs for general purpose computing has brought forth several success stories with respect to time taken, cost,... more
Where a licence is displayed above, please note the terms and conditions of the licence govern your use of this document. When citing, please reference the published version. While the University of Birmingham exercises care and attention... more
Speech recognition is a computationally demanding task, particularly the stage which uses Viterbi decoding for converting pre-processed speech data into words or sub-word units. We present an FPGA implementations of the decoder based on... more
The performance pressures on implementing effective network security monitoring are growing fiercely due to rising traffic rates, the need to perform much more sophisticated forms of analysis, the requirement for inline processing, and... more
In this paper, a high-performance secure hash algorithm 3 (SHA-3) is proposed to handle massive amounts of data for applications such as edge computing, medical image encryption, and blockchain networks. This work not only focuses on the... more
Computing paradigm based on von Neuman architectures cannot keep up with the ever-increasing data growth (also called “data deluge gap”). This has resulted in investigating novel computing paradigms and design approaches at all levels... more
This book presents a new technology for programming FPGAs. The psC language and the Novakod Studio IDE make FPGA programming accessible to C++ developers. All you need is a little C++, and you will easily learn psC to program FPGAs. The... more
In this paper, a space vector pulse width modulation technique is implemented to control a three-phase two-level inverter. The implementation of this modulation technique is carried out using Hardware Description Language. Firstly, the... more
The development of digital hardware technology has caused the rapid growth of complex algorithms implementation used in power electronics. The work carried out in this paper is about the study of the structure of the three-phase... more
In this paper, a phase disposition sinusoidal pulse width modulation (PD-SPWM) is used to control three-phase 3-level NPC inverter. The gate signals are generated with FPGA-Spartan 3E Board. The PD-SPWM algorithm is described in VHDL and... more
This paper proposes a decentralized control approach for the flexible operation of an autonomous AC microgrid (MG). AC MG typically consists of two or more voltage source inverters (VSI), capable of simultaneously regulating the voltage... more
This paper proposes a reinforcement ant optimized fuzzy controller (FC) design method, called RAOFC, and applies it to wheeled-mobile-robot wall-following control under reinforcement learning environments. The inputs to the designed FC... more
This paper proposes a type-2 self-organizing neural fuzzy system (T2SONFS) and its hardware implementation. The antecedent parts in each T2SONFS fuzzy rule are interval type-2 fuzzy sets, and the consequent part is of Mamdani type. Using... more
The increasing demand for pervasive security poses a challenge in achieving robust authentication at very low cost. Identification using human biometrics is considered the most robust solution, but requires powerful computers to be... more
As interest in alternative energy sources grows, grid-connected inverters are getting more advanced. Thus, to synchronize the output waveform of an inverter with the grid supply system, the frequency and phase angle ought to be... more
This paper presents an overview of different types of wideband direction of Arrival (DOA) estimation methods. Direction-finding algorithms have straight forward applications in Sonar and Radar, and are also useful in advanced satellite... more
The filtering process is widely used in several digital signal processing and digital image processing applications. The filter process is to remove the noise in original signal or image. THE LEAST MEAN SQUARE (LMS) adaptive filter is the... more
Fault-based side channel cryptanalysis is very effective against symmetric and asymmetric encryption algorithms. Although straightforward hardware and time redundancy based Concurrent Error Detection (CED) architectures can be used to... more
Many digital television standards provide a way to data transmission. The utilization of this capability includes the transmission of data stream for any interactive application. In this application the execution flow needs to be... more
The main purpose of this research paper is to reduce the railway accidents occurring at the level crossings (Intersection Points). Railway is the vast mode of the transportations in India and it is the cheapest way for travelling. So... more
Tato diplomová práce se zabývá strategiemi řízení, které jsou dostupné pro bezkartáčové DC motory, a které mohou být použity pro řízení rychlosti pohonů elektrických vozidel. Úkolem práce je studium rozličných řídicích algoritmů, nalezení... more
In this paper, we present results of a comprehensive study devoted to the optimization of FPGA implementations of modern cryptographic hash functions using embedded FPGA resources, such as Digital Signal Processing (DSP) units and Block... more
Sparse matrix-vector multiplication (SpMV) is a common operation in numerical linear algebra and is the computational kernel of many scientific applications. It is one of the original and perhaps most studied targets for FPGA... more
This paper presents a single FPGA implementation of a realtime sound localization system using two microphones. The implementation, utilizing a cross-correlation technique based on a modified version of the phase transform, successfully... more
Encryption in general and Advanced Encryption Standard (AES) in particular[1], is an application that is very friendly for Field Programmable Gate Array (FPGA) architecture. This is mainly due to the fact that all compu-tations are based... more
Rapid advances in VLSI technology have led to Field-Programmable Gate Arrays (FPGAs) being employed in High Performance Computing systems. Applications using FPGAs on reconfigurable supercomputers involve software on the system managing... more
This paper describes a comparison of two Montgomery modular multiplication architectures: a systolic and a multiplexed. Both implementations target FPGA devices. The modular multiplication is employed in modular exponentiation processes,... more
The Transportation Informatics and Telematics Knowledge Centre (after the abbreviation of its name in Hungarian: 'KITT') of Budapest Tech initiated its operation in the Autumn of 2006 thank to the financial support provided by the... more
This paper presents an approach to cryptanalysis of RSA cryptosystem based on the application of genetic algorithm. The search utilizes the idea of timing attack as computation time information may leak due to different modular operations... more
One of the classic algorithms of mathematical morphology is the image segmentation algorit hm of Rosenfeld-Pfaltz. This algorithm as presented was only applicable to binary images, although Cohen has previously presented an extaension to... more
Multilevel converters can meet the increasing demand of power ratings and power quality associated with reduced harmonic distortion and lower electromagnetic interference. When the number of levels increases, it is necessary to control... more
In this paper, we discuss the implementation of a lattice Quantum Chromodynamics (QCD) application to a Xilinx VirtexII FPGA device on an Alpha Data ADM-XRC-II board using Handel-C and logarithmic arithmetic. The specific algorithm... more
Image Segmentation is a process used in Computer Vision to automatically divide up an image. We investigate the suitability of FPGAs and Log Arithmetic for Image Processing. We implemented a Bayesian pixel-based segmentation algorithm in... more
RNA structure prediction, or folding, is a computeintensive task that lies at the core of several search applications in bioinformatics. We begin to address the need for high-throughput RNA folding by accelerating the Nussinov folding... more
Introduction The Virtex series of FPGAs have an SRL (Shift Register LUT) macro. This macro implements very efficient shift registers varying in length from one to sixteen bits as determined by the address lines. The length can be either... more
Bilinear pairing is a new and increasingly popular way of constructing cryptographic protocols. This has resulted in the development of Identity Based Encryption (IBE) that is ideally used in identity aware devices. The security of such... more
Unified formula for computing elliptic curve point addition and doubling are considered to be resistant against simple power-analysis attack. A new elliptic curve formula known as unified binary Huff curve in this regard has appeared into... more
This paper presents an FPGA based hardware design for Full Search Block Matching (FSBM) based Motion Estimation (ME) in video compression. The significantly higher resolution of HDTV based applications is achieved by using FSBM based ME.... more