Embedded and Reconfigurable Systems

The last few years have witnessed an increasing interest from computer scientists in the role emotions could play in the adaptability of artificially intelligent mechanisms. Evidence from neurologists suggests that affective states are crucial in the interaction between an individual and the environment. Furthermore, emotions often dominate our actions and some times override reasoning in the process of making decisions. In this paper an analysis of the use of Autoassociative Neural Networks (AANN) in the context of real-time physiological emotion detection for intelligent inhabited environments (IIE) is presented. Two main studies were undertaken: On one hand the effects of altered physiological responses stemmed from various degrees of emotive intensity and on the other hand the possible consequences of physical arousal not related to emotional expressiveness It is argued that the use of AANN contributes to an improved separation of emotional classes and a more accurate recognition of affective states in individuals with a varying degree of emotional responsiveness. It is also postulated that AANNs robustness is not affected by physiological disturbances associated with physical activities thus setting the basis for emotion recognition in real-life scenarios.

In this paper we introduce a vision for a new type of domestic appliance, a soft-appliance, constructed from aggregations of elementary network services. The vision is based on the possibility of 'deconstructing', logically, conventional home appliances such as TVs into their elemental functions which may then be combined in novel ways with other deconstructed services to generate soft-appliance of a person's own choosing. Additionally our aim is to describe the computer science challenges involved in fulfilling this vision. An essential component of this vision is a concept called a MAp (metaappliance/application); a semantic data template that describes the soft or virtual-appliance that can be instantiated by manufacturers and end-users in a way that redefines the nature of an appliance and which can be created, owned and traded. We also present a socio-technical framework to motivate the discussion of this research agenda, especially the use of the agent technology that would be needed to realise this vision.

This paper explores some a novel approaches to harnessing the Internet-of-Things (IoT) as a teaching and research vehicle in education. For teaching we argue that the Internet-of-Things provides a highly motivating topic to capture students' imaginations, and a perfect platform for teaching computer science. In addition, we explain the potential for entire campuses or buildings to be constructed from Internet-of-Things technologies and the potential for this infrastructure to act as a teaching platform. This proposition is perfectly captured by the axiom "The college building (or campus) is the lab". This philosophy is part of a wider movement that started in the EU, called Living Labs. In achieving these aims, our work seeks to combine a number of concepts; first we utilise the Internetof-Things, second we incorporate Living Labs ideas, third we harness the iCampus vision, forth we use the 'Smart Box' concept and finally we implement the Pervasive-interactive-Programming (PiP) paradigm. We contend this approach can be used in various mixes to produce highly motivating and effective educational environments. We illustrate this work by describing the application of these ideas to a real-world venture, the Harlow UTC (in the UK). The main focus of this paper concerns the use of PiP, together with the Internet-of-Things, to teach elementary programming skills. In in support of this we present results of an evaluation of PiP with 18 participants (students and staff) of varied age and gender. The main conclusions of these evaluations were that PiP enabled students and staff, with diverse backgrounds, to quickly master the programming skills involved. The paper concludes by describing our future plans for this work.

Abstract-The UML was designed as a graphical notation for use with object-oriented systems and applications. Because of its popularity, now it is emerging in the field of embedded systems design as a modeling language. The UML notation is useful in ...

International Conference on Internet of Things & Embedded Systems (IoTE 2020) will provide an excellent international forum for sharing knowledge and results in theory, methodology and applications of IoT and Embedded Systems. Authors are solicited to contribute to the conference by submitting articles that illustrate research results, projects, surveying works and industrial experiences that describe significant advances in the areas of Internet of Things and Embedded Systems.

The smart grid revolution has only been possible, thanks to the development and proliferation of smart meters. The increasingly growing computing capabilities for Internet of Things devices have made it possible for data to be processed directly from the devices where it is produced; this has been called edge computing. Edge computing is allowing the smart grid to become increasingly intelligent to solve problems that make electricity consumption more efficient and environmentally friendly. This work presents the implementation of a smart metering system that allows data analytics using a multiprocessing architecture directly on the smart meter. The results show that the development of smart meters with data analytics capabilities at the edge is a reality today, and the use of multiprocessing permits the improvement of data processing. This is an open access article under the CC BY-SA license.

A comprehensive simulation study has been conducted to show fine-grain reconfigurability in CMOS circuits using work-function engineering (WFE) on Schottky Barrier (SB) FinFETs for sub-10 nm gate length. The study has three subsections. First, two-transistor (2T) & 4T AOI (and-or-invert)/ OAI (or-and-invert) gates with select bits that allow multiple logic functions are introduced. Secondly, the use of WFE to create ultra-compact reconfigurable logic circuits of fundamental operations (0,1,OR, AND,NAND,NOR,XOR) are explored via novel 2T, 3T and 4T gates. These circuits include one or two select bits that are capable of commanding up to four functions with two inputs. To further illustrate the potential of WFE for reconfigurable logic, novel multi-stage circuits such as compact full-adders are also modelled via TCAD simulations. Power×delay product (PDP) figures and DC gain of the proposed gates are quantified and compared against the CMOS designs with similar functionality. Finally, we also design a novel compact one-bit arithmetic logic unit (ALU) which has seven exclusive logic operations (1, NAND, OR, XOR, NOR, Addition, Subtraction) with three select bits using only 26 SB-FinFETs, saving substantial amount of power and chip area. The trade-offs between the number of metal work-functions used in the designs, circuit complexity and simulated performance metrics are also provided. The comparative simulations between reconfigurable SB-FinFET based designs versus conventional p-n junction FinFET circuits show that WFE can lead to absolutely minimalist reconfigurable CMOS logic blocks using ×3 to ×10 less power and between ×2 and ×15 less area than static CMOS counterparts. Although they suffer greater delays (×2 to ×5), the overall PDP performance remains comparable to conventional CMOS.

Multiple Input Multiple Output (MIMO) uses multiple antennas at both the transmitter and receiver side. In recent times the demand for the use of MIMO systems has increased due to its capability of robustness against multipath fading and increasing the Spatial Multiplexing Gain and Spatial Diversity Gain. Orthogonal Frequency Division Multiplexing (OFDM) is one of the best digital modulation schemes, where signal is divided into number of narrow band channels to obtain spectral efficiency and minimizing the Inter Symbol Interference (ISI). Thus, combining MIMO and OFDM technologies will improve spectral efficiency, link reliability and spectral gain.
In this paper, MIMO and OFDM techniques are combined to improve the transmitter performance. Software reference model for 4x4-MIMO-OFDM Transmitter for wireless communication system is designed and modeled in
MATLAB as well as the same is implemented in C language. The evaluation of Bit Error Rate (BER) and Signal to Noise
Ratio (SNR) performance of the OFDM technique combined with Alamouti Space Time Block Codes (STBC) based on two
modulation schemes namely QPSK and 16 QAM over AWGN channels is carried out. The developed system model is
implemented in C and performance comparison & optimization are carried out using Real View Development Suite (RVDS) by considering different ARM cores.
Performance metrics such as Mean Square Error (MSE) and Peak Signal-to-Noise Ratio (PSNR) are computed for 4x4-MIMO-OFDM transmitter system and performance of whole system is analysed for QPSK and 16 QAM modulation techniques. BER for QPSK is 10-2.6 and BER for 16 QAM is 10-1.5 dB at a fixed SNR of 10 dB. System developed in C is analysed in RVDS. Profiling results shows that ARM cortex family provides better performance in terms of number
of cycles estimated to execution of code and code coverage when compared with lower versions of it. The number of
estimated cycles in ARM Cortex A9 is reduced by 8.5% when compared to ARM 1136. The work can be further enhanced
by using massive MIMO in place of conventional MIMO.

This paper describes the design sequence, 3D printing of instrument parts and electronic control system design for a pellet mixer. The work includes design of printable files, geometric design, and embedded system design for mobile control of the instrument. The assembled portable instrument functionality can be controlled through a smart phone from any location.

An approach to design of evolving computer system is presented. Drawbacks of existing systems are explained showing limitations of hardware and software. New design principles, models of representation for algorithms and architecture are introduced and described with explanation how to achieve better parallelism and reduce concurrency. Structure of required system software and hardware for reconfigurable adaptable system are presented and explained. Prototype architecture of evolving system of computer is discussed in terms of gain for performance, reliability and power- saving. Comparison with Berkley approach to future computer systems is given.

Forward Collision Avoidance (FCA) systems in automobiles is an essential part of Advanced Driver Assistance System (ADAS) and autonomous vehicles. These devices currently use, radars as the main sensor. The increasing resolution of camera sensors, processing capability of hardware chipsets and advances in image processing algorithms, have been pushing the camera based features recently. Monocular cameras face the challenge of accurate scale estimation which limits it use as a stand-alone sensor for this application. This paper proposes an efficient system which can perform multi scale object detection which is being patent granted and efficient 3D reconstruction using structure from motion (SFM) framework. While the algorithms need to be accurate it also needs to operate real time in low cost embedded hardware. The focus of the paper is to discuss how the proposed algorithms are designed in such a way that it can be provide real time performance on low cost embedded CPU's which makes use of only Digital Signal processors (DSP) and vector processing cores.

Real-time vision is central to many embedded applications (e.g. vehicle guidance). It is a computationally intensive task well beyond current general purpose computing platforms such as PCs and workstations. Thus, most real time vision systems need special high performance computing platforms, commonly provided in the form of parallel processing engines or dedicated hardware. The proposed architecture uses new generations of re-programmable logic devices and modularised hardware, thereby gaining the performance advantage of hard-wired logic with the flexibility and associated economies of programmable systems. The architecture takes the form of an extensive processing hierarchy consisting of a set of tightly coupled parallel processors, each processing a portion of the image using a classic pipeline arrangement. A programmable image splitting (and reconstruction) engine feeds this array and offers the potential of further enhancing the performance of the engines by restructuring the...

The objective of this project was to design and implement a pipelined processor on FPGA using Xilinx (Spartan3E). We have used a RISC-like instruction set in the project. Instructions are 1-byte or 2-bytes depending on the type of instructions. There are four 1-byte general purpose registers; R0, R1, R2, and R3. For both RAM and ROM, the memory address space is 256 bytes and is byte addressable. PC is the program counter that points to the next instruction to be executed. For call subroutine instruction (BR.SUB) a special register, link register (LR), holds the address of instruction after BR.SUB.

Réaliser des programmes en  VHDL  d’un  multiplexeur  4  vers  1  en  utilisant  les  deux instructions  conditionnelle  et  sélective,  ainsi  décrire  en  VHDL  une  bascule  D, puis  une  unité  arithmétique  et  logique  (UAL)  puis  un  Compteur  synchrone  et asynchrone.

Graphical Processing Units (GPUs) have become an integral part of today’s
mainstream computing systems. They are also being used as reprogrammable
General Purpose GPUs (GP-GPUs) to perform complex scientific
computations. Reconfigurability is an attractive approach to embedded
systems allowing hardware level modification. Hence, there is a high
demand for GPU designs based on reconfigurable hardware. The texture
filter unit is designed to process geometric data like vertices and convert
these into pixels on the screen. This process involves number of operations,
like circle and cube generation, rotator, and scaling. The texture filter unit is
designed with all necessary hardware to deal with all the different filtering
operations. The designed texture filtering units are modelled in Verilog on
Altera Quartus II and simulated using ModelSim tools. The functionality of
the modelled blocks is verified using test inputs in the simulator.Circle and
cube coordinates are generated for circle and cube generation. The work can
form the basis for designing a complete reconfigurable GPU.

When designing a micro-controller, it is important to think the way that micro-controllers work. Simply, it is data transfer and manipulation with sequential control for the data flow. CPU of the micro-controller is responsible for doing all these operations in addition to managing the communications with all other parts including memories and I/O ports.

My project objective is to design the CPU12, CPU of the HC12 micro-controller. Apart from memory, it consists simply from Data Path Unit and Control Unit. There was a challenge to make the design as structural as it could be and that has been satisfied for the Data Path Unit whereas Control unit was designed as a state machine which is totally in behavioral Level. Parallel 16-bit Multiplier and Fast 32-bit Divider have been added to the ALU offering fast mathematical operations and reducing the number of cycles that needed for Multiplication and Division instructions. The Design of the Control Unit in this project is simply a state diagram starts with the fetch, decode and execute states considering nine addressing modes. The two Units have been connected together to run a simple instruction (ADDA) for all addressing modes and give results showing all States, Units and signals that are involved to execute such instruction. And finally, the result of the addition is stored in the accumulator A in all cases.

Rotating machines are an integral part of large electrical power machinery in most of the industries. Any degradation or outages in the rotating electric machinery can result in significant losses in productivity. It is critical to monitor the equipment for any degradation’s so that it can serve as an early warning for adequate maintenance activities and repair. Prior research and field studies have indicated that the rotating machines have a particular type of signal structure during the initial start-up transient. This signal structure can be modelled by an exponentially damped sinusoidal signal during initial start-up. The major focus of this project is to take advantage of this a prior knowledge of signal structure to study the effect of degradation in two main signal parameters: frequency components of transient signal and the associated exponential damping factor.
In this work, a data acquisition system is first used to sample the transient signal. This signal is analysed on an embedded TMS320 based DSP core platform. Both FFT and MPM estimators have been implemented to study various signals captured by the data-acquisition system. For measuring the frequency of operation, both FFT and MPM were employed whereas the damping coefficient is calculated using MPM method. Initial implementation and validation was conducted in MATLAB and Simulink. Once validated, the code was ported on to TMS320 platform. The results show good agreement with expected results for both simulated and real-time data. The real-time data from AC water pumps which have rotating motors built-in were collected and analysed.
It is found that the frequency estimation performance of the MPM matches that of the FFT for synthetic and real time data. The evaluation of the condition of machines based on the damping coefficient using MPM matched with the actual condition of the machine.

International Journal of Embedded Systems and Applications (IJESA) is a quarterly open access peer-reviewed journal that publishes articles which contribute new results in all areas of the Embedded Systems and applications. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on understanding Embedded Systems and establishing new collaborations in these areas.

Due to big data progress in biomedical and healthcare communities, accurate study of medical data benefits early disease recognition, patient care and community services. When the quality of medical data is incomplete the exactness of study is reduced. Moreover, different regions exhibit unique appearances of certain regional diseases, which may results in weakening the prediction of disease outbreaks. In the proposed system, it provides machine learning algorithms for effective prediction of various disease occurrences in disease-frequent societies. It experiment the altered estimate models over real-life hospital data collected. To overcome the difficulty of incomplete data, it use a latent factor model to rebuild the missing data. It experiment on a regional chronic illness of cerebral infarction. Using structured and unstructured data from hospital it use Machine Learning Decision Tree algorithm and Map Reduce algorithm. To the best of our knowledge in the area of medical big data analytics none of the existing work focused on both data types. Compared to several typical estimate algorithms, the calculation exactness of our proposed algorithm reaches 94.8% with a convergence speed which is faster than that of the CNN-based unimodal disease risk prediction (CNN-UDRP) algorithm.

A comprehensive simulation study has been conducted to show fine-grain reconfigurability in CMOS circuits using work-function engineering (WFE) on Schottky Barrier (SB) FinFETs for sub-10 nm gate length. The study has three subsections. First, two-transistor (2T) & 4T AOI (and-or-invert)/ OAI (or-and-invert) gates with select bits that allow multiple logic functions are introduced. Secondly, the use of WFE to create ultra-compact reconfigurable logic circuits of fundamental operations (0,1,OR, AND,NAND,NOR,XOR) are explored via novel 2T, 3T and 4T gates. These circuits include one or two select bits that are capable of commanding up to four functions with two inputs. To further illustrate the potential of WFE for reconfigurable logic, novel multi-stage circuits such as compact full-adders are also modelled via TCAD simulations. Power×delay product (PDP) figures and DC gain of the proposed gates are quantified and compared against the CMOS designs with similar functionality. Finally, we also design a novel compact one-bit arithmetic logic unit (ALU) which has seven exclusive logic operations (1, NAND, OR, XOR, NOR, Addition, Subtraction) with three select bits using only 26 SB-FinFETs, saving substantial amount of power and chip area. The trade-offs between the number of metal work-functions used in the designs, circuit complexity and simulated performance metrics are also provided. The comparative simulations between reconfigurable SB-FinFET based designs versus conventional p-n junction FinFET circuits show that WFE can lead to absolutely minimalist reconfigurable CMOS logic blocks using ×3 to ×10 less power and between ×2 and ×15 less area than static CMOS counterparts. Although they suffer greater delays (×2 to ×5), the overall PDP performance remains comparable to conventional CMOS.

This paper explores some a novel approaches to harnessing the Internet-of-Things (IoT) as a teaching and research vehicle in education. For teaching we argue that the Internet-of-Things provides a highly motivating topic to capture students’ imaginations, and a perfect platform for teaching computer science. In addition, we explain the potential for entire campuses or buildings to be constructed from Internet-of-Things technologies and the potential for this infrastructure to act as a teaching platform. This proposition is perfectly captured by the axiom “The college building (or campus) is the lab”. This philosophy is part of a wider movement that started in the EU, called Living Labs. In achieving these aims, our work seeks to combine a number of concepts; first we utilise the Internetof- Things, second we incorporate Living Labs ideas, third we harness the iCampus vision, forth we use the ‘Smart Box’ concept and finally we implement the Pervasive-interactive-Programming (PiP) paradigm. We contend this approach can be used in various mixes to produce highly motivating and effective educational environments. We illustrate this work by describing the application of these ideas to a real-world venture, the Harlow UTC (in the UK). The main focus of this paper concerns the use of PiP, together with the Internet-of- Things, to teach elementary programming skills. In in support of this we present results of an evaluation of PiP with 18 participants (students and staff) of varied age and gender. The main conclusions of these evaluations were that PiP enabled students and staff, with diverse backgrounds, to quickly master the programming skills involved. The paper concludes by describing our future plans for this work.

Beverage vending machine systems are becoming popular in the Indian market. These systems are today available in Indian MNCs and some top rated restaurants and hotels. In most systems the operation are carried manually by the operator in which the billing and change making is carried out by the owner who runnig the shop or restaurant. In India tea and coffee habits were cultured by the colonial rule of the British and the Portuguese, even tody the colonial rule had been over but the habits of tea and coffee beverage consumptions becomes as the routine daily life. Hence there is a need to understand beverage vending machine systems to serve the Indian Market. In this paper, a critical analysis of requirement has been carried out and the system design had been arrived at.The system requirement demand an ARM based controller for better system performance. To meet the system performance criteria and richest of peripherals an LPC2148 with low cost had been selected. The system is more efficient to analyse the change making and the identification had been carried out using the motors, LCDs, water heater, solenoid valve, money box, change making and dispensing unit. The system is tested and validated for the specified test cases. The milk motor run for 10 rotations to drive 200 milligrams of milk powder to the container to make to tea or coffee beverage. In this system a stepper motor had been used can be replaced by using dc motors to avaoid power losses. In future an ATM or credit card based payment system can be incorporated to these systems.

Los sistemas energéticos basados en la
transferencia de Calor y Masa es una de las disciplinas
desarrolladas desde tiempos inmemoriales, La evolución de las
técnicas para conseguir con mayor eficiencia en estos sistemas
de energía ha tenido un rápido crecimiento debido al concepto
de energías renovables. El presente proyecto un concentrador
solar parabólico lineal, ayuda a demostrar la transferencia de
calor por medio de la radiación. El principio se basara en utilizar
la radiación solar para generar energía calorífica util.

Microcontroller system is one of the vital subjects offered by students during the sequence of study in universities and other colleges of science, engineering and technology in the world. In this paper, we solve the problem of student comprehension and skill development in embedded system design using microcontroller chip PIC16F887 by demonstration of hands-on laboratory experiments. Also, developments of software code, circuit diagram simulation were carried out. This is to help students connect their theoretical knowledge with the practical experience. Each of the experiments was carried out using BK300 development board, PICKit3 programmer, Proteus 8.0 software. Our years of experience in the teaching of microcontroller course and the active involvement of students as manifested in complete in-depth hands-on laboratory projects on real life problem solving. Laboratory session with the development board and software demonstrated in this article is unambiguous. Future embedded sys...

Recent technological advances have greatly improved the performance and features of embedded systems. With the number of just mobile devices now reaching nearly equal to the population of Earth, embedded systems have truly become ubiquitous. These trends, however, have also made the task of managing their power consumption extremely challenging. In recent years, several techniques have been proposed to address this issue. In this  paper, we survey the techniques for managing power consumption of embedded systems. We discuss the need of power management and provide a classification of the techniques on several important parameters to highlight their similarities and differences. This paper is intended to help the researchers and application-developers in gaining insights into the working of power management techniques and designing even more efficient high-performance embedded systems of tomorrow.

IEEE 2017 Embedded Project Titles for ECE, EEE, CSE, IT | Final Year IEEE Project Titles on Embedded System 2018
INTERNET OF THINGS (IOT)
A System for Monitoring Hand Hygiene Compliance based-on Internet-of-Things
Agricultural Crop Monitoring using IOT- A Study
An Autonomous Wireless Body Area Network Implementation Towards IoT Connected Healthcare Applications
Analysis of Three IoT-Based Wireless Sensors for Environmental Monitoring
Child Safety Wearable Device
Connecting physical things to a SmartCity-OS
Decentralized Configuration of Embedded Web Services for Smart Home Applications
Design of Online Monitoring Device for COD Parameter in Industrial Sewage Based on Soft Measurement Method
Developing Portable Instrument Based on Internet of Things for Air Quality Information System
Efficient Low Cost Supervisory System for Internet of Things Enabled Smart Home
EMACS: Design and Implementation of Indoor Environment Monitoring and Control System
Energy Autonomous Wireless Valve Leakage Monitoring System With Acoustic Emission Sensor
First step towards an IoT implementation of a wireless sensors network for environmental radiation monitoring
Health Care Monitoring System in Internet of Things (loT) by Using RFID
Internet-of-things based Smart Tracking
Real-Time Signal Quality-Aware ECG Telemetry System for IoT-Based Health Care Monitoring
Room Temperature Control and Fire Alarm/Suppression IoT Service Using MQTT on AWS
We-Care: An IoT-based Health Care System for Elderly People
Worldwide Auto-mobi: Arduino IoT Home Automation System for IR Devices
EMBEDDED WITH ANDROID
A Low Cost Automated Fluid Control Device using Smart Phone for Medical Application
Data Monitoring and Hardware Control for App Android by Bluetooth Communication for Laboratory Teaching in Electrical Engineering Courses
Design of Smart Neonatal Health Monitoring System using Sensor Mobile Cloud Computing
Mining Human Activity Patterns from Smart Home Big Data for Healthcare Applications
Real-time Traffic Light Recognition Based on Smart Phone Platforms
EMBEDDED
A Real Time Street Lighting Control System
A Two-level Traffic Light Control Strategy for Preventing Incident-Based Urban Traffic Congestion
A Unified Framework for Vehicle Rerouting and Traffic Light Control to Reduce Traffic Congestion
Automatic Detection of Red Light Running Using Vehicular Cameras
Body and Fall Detection System with Heart Rate Monitoring
Design and Implementation of Low Cost ECG Monitoring System for the Patient using Smart Device
Economic Feasibility Of Solar Powered Street Lighting System In Libya
Handover in Outdoor Visible Light Communication System
Intelligent Home Automation System using BitVoicer
LED Projection Module Enables a Vehicle to Communicate with Pedestrians and Other Vehicles
On Detecting Acceptable Air Contamination in Classrooms using Low Cost Sensors
Reverse Engineering the Communications Protocol of an RFID Public Transportation Card
RFID-Based Attendance Management System
Syncretic Use of Smart Meters for Power Quality Monitoring in Emerging Networks
Towards Intelligent Arabic Text-to-Speech Application for Disabled People
Tuning of a Stigmergy-based Traffic Light Controller as a Dynamic Optimization Problem
Wheel Therapy Chair: A smart system for disabled person with therapy facility
BIOMETRIC
Anti-theft Protection of Vehicle by GSM & GPS with Fingerprint Verification
Design and Implementation of a Fingerprint Based Lock System for Shared Access
Flexible Microdisplacement Sensor for Wearable/Implantable Biomedical Applications
Indoor Localization Framework with WiFi Fingerprinting
SecureHouse: A Home Security System Based on Smartphone Sensors
ROBOTICS
An Android Based Human Computer Interactive System with Motion Recognition and Voice Command Activation
Low-Cost, Real-Time Obstacle Avoidance for Mobile Robots
Mine Detecting Robot Prototyping
Mobile Quad-Controlled Wireless Robotic Arm
Robotic Testing of Mobile Apps for Truly Black-Box Automation
WIRELESS
A Real-Time Flood Alert System for Parking Lots
A Smart Meter Design and Implementation Using ZigBee Based Wireless Sensor Network in Smart Grid
A Study of the Mesh Topology in a ZigBee Network for Home Automation Applications
Design and Implementation of Real Time Transformer Health Monitoring System Using GSM Technology
E-health Acquistion, Transmission &Monitoring System
Electrical Appliances Control Prototype by Using GSM Module and Arduino
Energy-Efficient Localization and Tracking of Mobile Devices in Wireless Sensor Networks
Improvement in Multiple Access Channel Allocation for Sensor Node Configuration Based on RFID Communication
Lightweight Mashup Middleware for Coal Mine Safety Monitoring and Control Automation
Microcontroller based Digital Meter with Alert System using GSM
Realisation of a Smart Plug device based on Wi-Fi technology for use in Home Automation systems

International Journal of Embedded Systems and Applications (IJESA) is a quarterly open access peer-reviewed journal that publishes articles which contribute new results in all areas of the Embedded Systems and applications. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on understanding Embedded Systems and establishing new collaborations in these areas.

International Journal of Embedded Systems and Applications (IJESA) is a quarterly open access peer-reviewed journal that publishes articles which contribute new results in all areas of the Embedded Systems and applications. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on understanding Embedded Systems and establishing new collaborations in these areas.

At the beginning of taking a shower, the user needs to manually adjust a rotational handle or the ratio of cold and hot water to get the desired water temperature and the flow rate. In this paper, a temperature and flow rate sensor feedback smart shower is proposed which takes the target water temperature and flow rate from the user as input, and then automatically adjusts the ratio of the cold and the hot water during the shower to keep the temperature and flow rate fixed-even though there is fluctuation of supply water temperature and pressure. The proposed system contains distance sensor and automatically turns off the shower when the user is away for soaping or shampooing. The system generates a report on water usage and shower time – to promote awareness on saving water. An embedded system based prototype of the proposed shower has been developed and tested.

Digital communications has helped us achieve two way conversations in digital domain, in which messages are encoded into the communication channel and then decoded at the receiver end. During the transfer of message, the data might get corrupted due to disturbances in the communication channel. Hence, it is necessary that the decoder has an in-built function of detecting and correcting the errors that might occur.This project deals with channel coding with an objective of error correction and detection using a forward error correction algorithm viz. Hamming Code, which is basically a linear block code. The implementation of this code is done on ACTEL-ProASIC3 FPGA (250Kgates), and programmed in VHDL. The HDL entry is made in LIBERO-IDE CAD tool , Synplify tool is used for synthesis, Netlist Viewer for generation of Netlists and Timer for Static Timing Analysis. The unit testing of each module and integration testing of the system is performed by simulation in MODELSIM 6.6d and by actual hardware implementation on Actel ProASIC3 FPGA. The code rate achieved here is 57.1%.FPGA is preferred over microcontroller development boards because variable frequency and dedicated pathways comprised of programmable logic blocks in FPGA's allow high speed implementation of large data streams. The aim of this project is to implement a semiconductor IP Core. The FPGA Prototype we designed serves as a predecessor for ASIC.

Graphical Processing Units (GPUs) have become an integral part of today’s
mainstream computing systems. They are also being used as reprogrammable
General Purpose GPUs (GP-GPUs) to perform complex scientific
computations. Reconfigurability is an attractive approach to embedded
systems allowing hardware level modification. Hence, there is a high demand
for GPU designs based on reconfigurable hardware. Stream processor
consists of clusters of functional units which provide a bandwidth hierarchy,
supporting hundreds of arithmetic units. The arithmetic cluster units are
designed to exploit instruction level parallelism and subword parallelism
within a cluster and data parallelism across the clusters.For decreasing the
area and power, a single controller is used to control data flow between
clusters and between host processor and GPU. The designed of stream
processor unit has been carried out in Verilog on Altera Quartus II and
simulated using ModelSim tools. The functionality of the modelled blocks is
verified using test inputs in the simulator.The simulated execution time of 8-
bit pipelined multiplier is 60 ps and 100 ns for 8-bit pipelined adder while
operating at 90 MHz.

ABSRACT Motor vehicles are the prime source of transportation where vehicles with A/C play a major part. This paper designs an embedded system for a vehicle cabin, which senses the gases like carbon-monoxide and oxygen and displayed at each and every second. If the level of the CO increases than the normal level (30ppm) or the level of the oxygen decreases than the normal level (19%) then an alarm is generated automatically and also ventilation is provided immediately. A warning message is sent to the authorized user via GSM. The advantage of this system is proper detection and faster response time leading to faster diffusion of the situation, compared with the manual methods.

Become an Embedded System Engineer

Comprehensive Guide on how to be an Embedded System Engineer and master Needed Skills to Succeed.



What you should learn to become an Embedded System Engineer
Learn Embedded C
Learn how to program, use and interact with Arduino
Learn how to program, use and interact with PIC Microcontroller
Learn Communication Protocols
Learn Circuit Design and Simulation from scratch
Learn 3D Design and Simulation to make your own 3D Models
Learn PCB Fabrication from scratch
Learn everything about Embedded System
Learn to use all the software tools needed to be successful as an Embedded System Engineer
Build an Arduino prototype to create your own game using LEDs
Learn how to solve complex problems with microcontrollers
Learn how to make your own products - make them work!
How to implement communication protocols in your project

Abstract: Reversible sequential circuits are considered the significant memory block for their ultra-low power consumption. Universal shift register is an important memory element of the sequential circuit family. In this paper we proposed efficient design of reversible universal shift register that is optimized in terms of quantum cost, delay and garbage outputs. Appropriate theorems and lemmas are presented to clarify the proposed designs and establish its efficiency.

International Journal of Embedded Systems and Applications (IJESA) is a quarterly open access peer-reviewed journal that publishes articles which contribute new results in all areas of the Embedded Systems and applications. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on understanding Embedded Systems and establishing new collaborations in these areas.

IET indexes its books and journal in SCOPUS and IEEE Xplore.
Computer Vision (CV) and Sensors play a decisive role in the operation of Unmanned Aerial Vehicle (UAV), but there exists a void when it comes to analysing the extent of their impact on the entire UAV system. In general, the fact that a UAV is a Cyber-Physical System (CPS) is not taken into account. In this proposal, we propose to expand on earlier books covering the use of CV and sensing in UAVs. Among other things, an entirely autonomous UAV can help to (i) obtain information about the environment, (ii) work for an extended period of time without human interference, (iii) move either all or part of itself all over its operating location devoid of human help and (iv) stay away from dangerous situations for people and their possessions. A Vision System (VS) entails the way CV data will be utilized, the appropriate architecture for total avionics integration, the control interfaces, and the UAV operation. Since the VS core is its sensors and cameras, multi-sensor fusion, navigation, hazard detection, and ground correlation in real time are important operational aspects that can benefit from CV knowledge and technology. This book will aim to collect and shed some light on the existing information on CV software and hardware for UAVs as well as pinpoint aspects that need additional thinking. It will list standards and a set of prerequisites (or lack of them thereof) when it comes to CV deployment in UAVs. The issue of data fusion takes a centre place when the book explores ways to deal with sensor data and images as well as their integration and display. The best practices to fuse image and sensor information to enhance UAV performance by means of CV can greatly improve all aspects of the corresponding CPS. The CPS viewpoint can improve the way UAVs interact with the Internet of Things (IoT), use cloud computing, meet communications requirements, implement hardware/software paradigms necessary to handle video streaming, incorporate satellite data, and combine CV with Virtual/Augmented Realities.

VOLUME 1-CONTROL AND PERFORMANCE: This tome explores how sensors and computer vision technologies are used in unmanned aerial vehicles for the navigation, control, stability, reliability, guidance, fault detection, self-maintenance, strategic replanning and reconfiguration of the entire system. It helps analyse the manner UAVs interact with the Internet of Things (IoT), use cloud computing, meet communications requirements, implement hardware/software paradigms necessary to handle still imagery, video streaming, incorporate satellite data, and combine computer vision with virtual/augmented realities (VR/AR).NB: This is planned to be the companion volume of Estrela, Hemanth, Saotome (Eds) / Imaging and Sensing for Unmanned Aerial Vehicles: Volume 2-Deployment and Applications

This paper presents the architecture and VHDL design of a Two Dimensional Discrete Cosine Transform (2D-DCT) with Quantization and zigzag arrangement. This architecture is used as the core and path in JPEG image compression hardware. The 2D-DCT calculation is made using the 2D-DCT Separability property, such that the whole architecture is divided into two 1D-DCT calculations by using a transpose buffer. Architecture for Quantization and zigzag process is also described in this paper. The quantization process is done using division operation. This design aimed to be implemented in Spartan-3E XC3S500 FPGA. The 2D-DCT architecture uses 1891 Slices, 51I/O pins, and 8 multipliers of one Xilinx Spartan-3E XC3S500E FPGA reaches an operating frequency of 101.35 MHz One input block with 8 x 8 elements of 8 bits each is processed in 6604 ns and pipeline latency is 140 clock cycles .

This paper is present very common arithmetic circuit .This circuit is faster has low power consumption by using a new 3 transistor XOR gate. It has two basic features high speed & low power consumption .For the arithmetic circuit very useful parameter low power consumption & time delay. The area of a circuit is directly related to number of gates used in a circuit. In the present design one bit 8T full adder minimizes area, and hence power efficiency. This paper contributes to better understanding of the behavior of single bit full adder cell .When low power delay products are essential full adder cell have been implemented in Tanner 14 Ver. suit and simulation using 70nm CMOS technology to obtain of the performance of the cell with respect to time and power consumption.

11th International Conference on Embedded Systems and Applications (EMSA 2022) will provide an excellent international forum for sharing knowledge and results in theory, methodology and applications of Embedded Systems. The goal of this Conference is to bring together researchers and practitioners from academia and industry to focus on understanding Modern Embedded Systems concepts and establishing new collaborations in these areas.

In this Thesis an overview on the state of the art of direct drive architecture for Hall Effect Thrusters (D2HET) is given.
Direct and indirect advantages are examined in relation with different kinds of missions, and two parameters, related to thruster duty cycle and thruster power fraction, are defined in order to assess a qualitative estimate.
As an experimental campaign is to be conducted on a 5 kW Hall Thruster in high thrust and high I sp regimes, a setup for the experiment is proposed and the D2HET system has been simulated in first approximation to assess its behaviour.
A photovoltaic plant has been designed in accordance with the experiment requirements, and a code has been developed to define the final architecture.
The simulation has been functional to the definition of the critical components used in the filter.