An algebraic approach to hardware/software partitioning.

Formal Methods in System Design, 2004

A crucial point in hardware/software co-design is how to perform the partitioning of a system into hardware and software components. Although several algorithms to partitioning have been recently proposed, the formal verification of the partitioning procedure is an emergent research topic. In this paper we present an innovative and automatic approach to partitioning with emphasis on correctness. The formalism used is occam and the algebraic laws that define its semantics. In the proposed approach, the partitioning procedure is characterised as a program transformation task and the partitioned system is derived from the original description of the system by applying transformation rules, all of them proved from the basic laws of occam. A tool has been developed to allow the partitioning to be carried out automatically. The entire approach is illustrated here through a small case study.

2003

We propose in this paper an algebraic approach to hard-ware/software partitioning in Verilog Hardware Description Language (HDL). We explore a collection of algebraic laws for Verilog programs, from which we design a set of syntax-based algebraic rules to conduct hardware/software partitioning. The co-specification language and the target hardware and software description languages are specific subsets of Verilog.

1995

Design of embedded systems has brought the discipline of hardware software codesign into focus. A major task of such codesign activity is partitioning the functions into hardware and software implementation sets. In this paper, we propose an algorithm which performs such partitioning and also allocates the functions to modules. The task has been formulated as a consistent labeling problem. To deal with the combinatorial nature of the problem, a number of heuristics have been proposed and their relative performances have been evaluated experimentally. The algorithm has been applied to solve several design problems

… , 1993, with the European Event in …, 1994

ACM Transactions on Design Automation of Electronic Systems, 2003

This paper presents an in-depth study of several system partitioning procedures. It is based on the appropriate formulation of a general system model, being therefore independent of either the particular co-design problem or the specific partitioning procedure. The techniques under study are a knowledge-based system and three classical circuit partitioning algorithms (Simulated Annealing, Kernighan&Lin and Hierarchical Clustering). The former has been entirely proposed by the authors in previous works while the later have been properly extended to deal with system level issues. We will show how the way the problem is solved biases the results obtained, regarding both quality and convergence rate. Consequently it is extremely important to choose the most suitable technique for the particular co-design problem that is being confronted.

Design Automation for Embedded Systems, 2011

Embedded systems are widely used in many sophisticated applications. To speed the time-to-market cycle, the hardware and software co-design has become one of the main methodologies in modern embedded systems. The most important challenge in the embedded system design is partitioning; i.e. deciding which modules of the system should be implemented in hardware and which ones in software. Finding an optimal partition is hard because of the large number and different characteristics of the modules that have to be considered.

1997

This paper presents the underlying methodology of Cosmos, an interactive approach for hardware software c o-design capable of handling multiprocessor systems and distributed a r chitectures. The approach covers the co-design process through a set of user guided t r ansformations allowing semi-automatic partitioning. The transformations are b ased o n a p owerful set of primitives for functional partitioning, structural reorganization and communication transformation. It leads to a fast transformation of a systemlevel speci cation into an architecture with a short design time and fast exploration of design space. The application of this approach is illustrated using a design example starting from a system-level speci cation given in SDL to a distributed hardware software a r chitecture described in C VHDL. We show that the use of transformational approach allows:

ACM Transactions on Design Automation of Electronic Systems, 2003

This paper presents an in-depth study of several system partitioning procedures. It is based on the appropriate formulation of a general system model, being therefore independent of either the particular co-design problem or the specific partitioning procedure. The techniques under study are a knowledge-based system and three classical circuit partitioning algorithms (Simulated Annealing, Kernighan&Lin and Hierarchical Clustering). The former has been entirely proposed by the authors in previous works while the later have been properly extended to deal with system level issues. We will show how the way the problem is solved biases the results obtained, regarding both quality and convergence rate. Consequently it is extremely important to choose the most suitable technique for the particular co-design problem that is being confronted.

Co-design methodology deals with the problem of designing complex embedded systems, where Hardware/software partitioning is one key challenge. It decides strategically the system's tasks that will be executed on general purpose units and the ones implemented on dedicated hardware units, based on a set of constraints. Many relevant studies and contributions about the automation techniques of the partitioning step exist. In this work, we explore the concept of the hardware/software partitioning process. We also provide an overview about the historical achievements and highlight the future research directions of this co-design process.

Proceedings of the 6th ACM conference on Computing frontiers - CF '09, 2009

There is a trend towards using accelerators to increase performance and energy efficiency of general-purpose processors. Adoption of accelerators, however, depends on the availability of tools to facilitate programming these devices.