Sparse polynomial division using a heap

2009

We present a high performance algorithm for multiplying sparse distributed polynomials using a multicore processor. Each core uses a heap of pointers to multiply parts of the polynomials using its local cache. Intermediate results are written to buffers in shared cache and the cores take turns combining them to form the result. A cooperative approach is used to balance the load and improve scalability, and the extra cache from each core produces a superlinear speedup in practice. We present benchmarks comparing our parallel routine to a sequential version and to the routines of other computer algebra systems.

Polynomial Division is a most common numerical operation experienced in many filters and similar circuits next to multiplication, addition and subtraction. Due to frequent use of such components in mobile and other communication applications, a fast polynomial division would improve overall speed for many such applications. This project is to design, develop and implement an efficient polynomial divider algorithm, along with the circuit. Next its output performance result is verified using Verilog simulation. A literature survey on the normal division algorithms currently used by ALU’s to perform division for large numbers, yielded Booth’s algorithm, Restoring and Non-restoring algorithm. Verilog simulation of these algorithms were used to derive efficiency in terms of the timing characteristics, required chip area and power dissipation. Initially, performance analysis of the existing algorithms was done based on the simulated outputs. Later similar analysis with the updated polynomial divider circuit is performed.

ACM SIGSAM Bulletin, 2003

How should one design and implement a program for the multiplication of sparse polynomials? This is a simple question, necessarily addressed by the builders of any computer algebra system (CAS). To examine a few options we start with a single easily-stated computation which we believe represents a useful benchmark of "medium difficulty" for CAS designs. We describe a number of design options and their effects on performance. We also examine the performance of a variety of commercial and freely-distributed systems. Important considerations include the cost of high-precision (exact) integer arithmetic and the effective use of cache memory.

2005

Division is one of the basic operations of arithmetic algorithms, but the cost associated to its hardware implementation exceeds the reasonable limits for most dedicated architectures. This paper provides a systematic algorithm that (a) transforms the constant coefficient division into a constant coefficient multiplication, selectable under some given constraints, and (b) optimizes the resulting multiplier by analyzing the quantization noise inherent to the finite wordlength implementation process. Consequently, this algorithm achieves reduced-area, high-speed constant coefficient dividers that maintain the accuracy in the range of represented numbers. The theorems and presented results confirm that the proposed algorithm computes the most suitable fraction under a given set of noise constraints.

Computers & Mathematics with Applications, 1997

A new algorithm for splitting polynomials is presented. This algorithm requires O(d log −1) 1+δ floating point operations, with O(log −1) 1+δ bits of precision. As far as complexity is concerned, this is the fastest algorithm known by the authors for that problem. An important application of the method is factorizing polynomials or polynomial root-finding.

Mathematics of Computation, 1994

Recurrence relations for the coefficients of the nth division polynomial for elliptic curves are presented. These provide an algorithm for computing the general division polynomial without using polynomial multiplications; also a bound is given for the coefficients, and their general shape is revealed, with a means for computing the coefficients as explicit functions of n .

IEEE Transactions on Computers, 2000

In this paper, the use of an efficient sparse minor expansion method to directly compute the subresultants needed for the greatest common denominator (GCD) of two polynomials is described. The sparse minor expansion method (applied either to Sylvester's or Bezout's matrix) naturally computes the coefficients of the subresultants in the order corresponding to a polynomial remainder sequence (PRS), avoiding wasteful recomputation as much as possible. It is suggested that this is an efficient method to compute the resultant and GCD of sparse polynomials.

Proceedings of the 1991 international symposium on Symbolic and algebraic computation - ISSAC '91, 1991

We present two algorithms for interpolating sparse rational functions. The first is the interpolation algorithm in a sense of sparse partial fraction representation of rational functions. The second is the algorithm for computing the entier and the remainder of a rational function. The first algorithm works without apriori known bound on the degree of a rational function, the second one is in the parallel class NC provided that the degree is known. The presented algorithms complement the sparse interpolation results of [GKS 90].

Very Fast Integer Divide,,Greatest Common Divisor(GCD), Ineteger Multiply with Pseudo Code, 2022

In this paper we discuss the binary implementations of Integer Divide, Greatest Common Divisor(GCD), and Integer Multiply. This fast binary Integer Division, Very Fast Binary GCD and parallel O(1) addition and subtraction can be implemented in an Arithmetic Logic Unit or ALU of CPUs to form modern CPUs with very fast Multiprecision Arithmetic. If the four operations such as addition,subtraction multiplication and division is performed in hardware in an ALU of a CPU then this accelerates all the current software available for that Instruction Set Architecture transparently without modification making a win win situation possible. As well these four arithmetic operations are those of Galois Fields speeding up Arithmetic and Cryptography. We could also temporarily implement an ALU on an FPGA, with suitable high speed clocks, add on PCI express card and that ALU would be faster than the native CPU's ALU perhaps. The Add-On hardware accelerator could talk to the CPU directly through a PCI Express bus with a protocol that transfers bytes of MultiPrecision Arithmetic Data between them. It could have an initial byte to identify the arithmetic operation and them four bytes or more to signify the length of the data perhaps similar to the Microsoft Wave format for digitized sound streams. The ALU's of Digitial Signal Processors could also be replaced to make for very fast arithmetic. These CPU's with Accelerated ALU's could make real time Artificial Intelligence training and pattern recognition possible in real time. That is real time AI. Usually Binary Integer division is done by successively subtracting the divisor from the dividend (in the schoolbook method) until what remains is less than the divisor which is the remainder and the quotient is the sum of all times we subtracted from the dividend to get the remainder which is less than the divisor. A very fast method to perform integer division would be if both the dividend and the divisor are assumed to be positive integers for simplicity. If we subtract the maximum allowable amount from the dividend n each time, by shifting the divisor d by m bits to the left, when the left most, most significant bits are aligned of n and the left shifted d ,(multiply by 2 m the d and subtract) where m is the bits of left shift, and is the string length in the binary representation of n is equal to k and the string length in binary of d in bits, say, p to form our m = k − p to derive our maximum possible left shift of d to give d = d * 2 m. But now there may be a problem with the the dividend n being smaller than d. If so we must right shift d one bit or d = d 2 such that n > d. Now form the next n = n − d. The quotient q is the running sum of the left shifts of d as the powers of 2. So q = 2 m i over i such that, through successive left shifts of d i and subtractions of d i from n i we arrive at a remainder r = n i where n i < d and stop and output the q = 2 m i and r = n i .

In this paper, the use of an efficient sparse minor expansion method to directly compute the subresultants needed for the greatest common denominator (GCD) of two polynomials is described. The sparse minor expansion method (applied either to Sylvester's or Bezout's matrix) naturally computes the coefficients of the subresultants in the order corresponding to a polynomial remainder sequence (PRS), avoiding wasteful recomputation as much as possible. It is suggested that this is an efficient method to compute the resultant and GCD of sparse polynomials.

IEEE Symposium on Foundations of Computer Science, 1988

Algorithms are developed that adopt a novel implicit representation for multivariate polynomials and rational functions with rational coefficients, that of black boxes for their evaluation. We show that within this representation the polynomial greatest common divisor and factorization problems, as well as the problem of extracting the numerator and denominator of a rational function, can all be solved in random polynomial-time. Since we can convert black boxes efficiently to sparse format, problems with sparse solutions, e.g., sparse polynomial factorization and sparse multivariate rational function interpolation, are also in random polynomial time. Moreover, the black box representation is one of the most space efficient implicit representations that we know. Therefore, the output programs can be easily distributed over a network of processors for further manipulation, such as sparse interpolation.

ANZIAM Journal, 2019

Computing the greatest common divisor (GCD) for two polynomials in floating point arithmetic is computationally challenging and even standard library software might return the result GCD=1 even when the polynomials have a nontrivial GCD. Here we review Euclid&#39;s algorithm and test a variant for a class of random polynomials. We find that our variant of Euclid&#39;s method often produces an acceptable result. However, close monitoring of the norm of the vector of coefficients of the intermediate polynomials is required. References R. M. Corless, P. M. Gianni, B. M. Trager, and S. M. Watt. The singular value decomposition for polynomial systems. In Proceedings of the 1995 International Symposium on Symbolic and Algebraic Computation, ISSAC &#39;95, pages 195207. ACM, 1995. doi:10.1145/220346.220371. H. J. Stetter. Numerical polynomial algebra. SIAM, 2004. doi:10.1137/1.9780898717976. Z. Zeng. The numerical greatest common divisor of univariate polynomials. In Randomization, relaxat...

Proceedings of the 2007 international symposium on Symbolic and algebraic computation - ISSAC '07, 2007

We present a first sparse modular algorithm for computing a greatest common divisor of two polynomials f1, f2 ∈ L[x] where L is an algebraic function field in k ≥ 0 parameters with r ≥ 0 field extensions. Our algorithm extends the dense algorithm of Monagan and van Hoeij from 2004 to support multiple field extensions and to be efficient when the gcd is sparse. Our algorithm is an output sensitive Las Vegas algorithm. We have implemented our algorithm in Maple. We provide timings demonstrating the efficiency of our algorithm compared to that of Monagan and van Hoeij and with a primitive fraction-free Euclidean algorithm for both dense and sparse gcd problems.

Lecture Notes in Computer Science, 2014

The Basic Polynomial Algebra Subprograms (BPAS) provides arithmetic operations (multiplication, division, root isolation, etc.) for univariate and multivariate polynomials over common types of coefficients (prime fields, complex rational numbers, rational functions, etc.). The code is mainly written in CilkPlus [10] targeting multicore processors. The current distribution focuses on dense polynomials and the sparse case is work in progress. A strong emphasis is put on adaptive algorithms as the library aims at supporting a wide variety of situations in terms of problem sizes and available computing resources.