Using a programming language for digital system design

The design and analysis of embedded, mixed hardware/software systems, such as PC cards, application specific hardware, m-and e-commerce devices, mobile telecommunication infrastructure and associated software drivers, is hard. An important issue for correct codesign is the search for a highly compositional and unifying formal approach that crosses the hardware/software boundaries and enables us to keep up with the fast growth in the complexity and variety of electronic devices and their associated software. Hardware/software codesign is a relatively new discipline interconnecting several other fields of research such as Electronics Engineering and Computer Science with the earliest reference to codesign dated back to 1992. In this thesis, I describe an integrated compositional framework for codesign of mixed hardware/software systems, together with its underpinning theory of semantics and refinement. My work integrates formal methods into the design process and the focus of the thesis i ABSTRACT ii is on refinement from a formal specification into a formal hardware part and a formal software part. Central to my methodology is that the synthesis and design start with a single highlevel abstract specification which captures the desired behaviour(s) of the system. Decisions are then taken through correctness preserving refinement steps. I have given formal semantics to Verilog-a Hardware Description Language (HDL) conceived in and extensively used by the hardware industry-in both denotational (in specification-oriented style) and operational terms and my work on Verilog enables me to blend existing and commercially available hardware synthesis tools and methodologies into my formal framework. This has the benefit of linking software development with hardware development in an integrated fashion and therefore span the gap between hardware and software formally. The equivalence between the two forms of semantics is proven and a set of generic refinement laws is presented. A detailed case-study of a smart card application of the Rivest Shamir Adleman (RSA) encryption algorithm is provided to evaluate my approach.

2005

I propose a systematic review and evaluation of the use of general purpose, high-level programming languages for the design and synthesis of circuit specifications that implement algorithms directly as specialized hardware configurations. Specifically, I propose an examination of the, so-called, semantic gap between the understood features and semantics of popular software programming languages such as C and C++, and the capabilities of programmable logic devices such as FPGAs. A significant amount of research effort has already been devoted to this topic, but it is my belief that this research has generally failed to adequately address certain key issues in both principle and implementation. My research will comprise a study of the theory and practice of programming hardware descriptions, with the aim of providing insights that suggest how to bridge the semantic gap and yield more effective hardware programming techniques.

Encyclopedia of Information Science and Technology, Third Edition

Lecture Notes in Computer Science, 2000

An operational semantics for a significant subset of the Verilog Hardware Description Language (HDL) has been developed. An unusual aspect of the semantics is that it was formulated as a Prolog logic program. This allows the possibility of simulating the semantics. In addition, a literate programming style has been used, so the semantics can be processed by the L A T E X document preparation system with minimal and fully automated preprocessing. Bringing together the paradigms of operational semantics, logic programming and literate programming in this manner has proved a great aid in a number of ways. It has helped improve the understanding of the semantics, in the formalization of semantic aspects left informal in the original mathematical formulation of the semantics, and in the maintenance of the formal semantics and its associated informal description. Civilization advances by extending the number of important operations which we can perform without thinking about them.

IEEE Transactions on Computers, 2000

Languages for describing digital systems have two messages to convey. They must provide enough information about the behavior of the system to permit simulation, and enough information about the structure of the system to indicate how it might be built. This double requirement distinguishes system description languages from conventional programming languages and necessitates special methods for documenting the meaning of the language. Such languages have a single form, or syntax, but two meanings, or semantics. Documentation of the language requires the definition of two distinct meanings.

icfem, 2000

2011

Many people may see the development of software and hardware like different disciplines. However, there are great similarities between them that have been shown due to the appearance of extensions for general purpose programming languages for its use as hardware description languages. In this contribution, the approach proposed by the MyHDL package to use Python as an HDL is analyzed by making a comparative study. This study is based on the independent application of Verilog and Python based flows to the development of a real peripheral. The use of MyHDL has revealed to be a powerful and promising tool, not only because of the surprising results, but also because it opens new horizons towards the development of new techniques for modeling and verification, using the full power of one of the most versatile programming languages nowadays.

2011

… Hardware Design and …, 1999

Abstract. Hardware description languages (HDLs) are used today to describe circuits at all levels. In large HDL programs, there is a need for source code reduction techniques to address a myriad of problems in formal verification, design, simulation, and testing. Program ...

2002

Abstract The goal of this paper is to evaluate the performance of digital systems generated from a high-level description language. The target language in this work is SDL. The SDL description is automatically synthesized with a codesign tool, resulting in a VHDL description. The codesign tool is responsible for software, hardware and communication synthesis.