Comparative Study of Diode Clamped Multilevel Inverter

The multilevel inverters have drawn tremendous interest in the power industry. The unique structure of multilevel voltage source inverter allows them to reach high voltages with low harmonics without the use of transformers or series-connected synchronized switching devices. A diode clamped multilevel inverter is used .For these type of inverters as the number of levels is high enough ,the harmonic content will be low enough to avoid filters. The inverter efficiency is higher and it is having simple control methods than all other types of multilevel inverters. A nine level multilevel inverter is used here. A comparative study on the THD of nine level diode clamped inverter has been carried out. The diode clamped inverter provides multiple voltage levels from a nine level unidirectional voltage balancing method. Multicarrier SPWM control is used to obtain high quality sinusoidal output voltage with reduced harmonics. It is an effective replacement for the conventional method which has high switching losses and poor drive performance. It reduces the total harmonic distortion and enhances performance of any drive system. Variation in the performance characteristics of the induction motor has been done by connecting it with multilevel inverter. The effectiveness of the system is verified through simulation using MATLAB Simulink package and hardware implementation has been done.

Multilevel inverter is an important alternative technique in high power, medium voltage power control. Multilevel inverter topology is classified in to diode clamped multilevel inverter (DCMLI), flying capacitors multilevel inverter, cascaded inverter with separate dc source. This project presents diode clamped multilevel inverter with sinusoidal pulse width modulation (SPWM) framework. The carrier based SPWM technique is developed to facilitate its implementation in diode clamped multilevel inverter. Diode clamped multilevel inverter using MOSFET as switching device is used in this particular project. Furthermore, in this study reduction of harmonics has been stressed on using diode clamped multilevel inverters. It also states the adverse effects of Total Harmonic Distortion (THD) on generation and transmission equipments. It also explains about Common Mode Voltage and its effects in brief. Multilevel Inverters have been designed, modeled and simulated and the output results have been depicted in the form of waveforms, THD analysis modules using MATLAB SIMULINK and the results are systematically tabulated.

The power electronics device which converts DC power to AC power at required output voltage and frequency level is known as inverter. Multilevel inverter is to synthesize a near sinusoidal voltage from several levels of dc voltages. In order to maintain the different voltage levels at appropriate intervals, the conduction time intervals of MOSFETS have been maintained by controlling the pulse width of gating pulses. In this paper single phase to three phase power conversion using PWM technique. The simulation is carried out in MATLAB/Simulink environment which demonstrate the feasibility of proposed scheme.

The solution of power quality problem employ improved performance converters. Pulse width modulation converter has become an integral part of these improved performance converters, require high voltage, high-frequency switching devices. Recently multilevel inverters are being emerged as a viable solution of the conventional 2-level inverter for medium and high voltage applications with improved power quality. In this Paper a single phase five level diode clamped inverter is designed, developed and investigated for improve voltage quality in terms of harmonic distortion with reducing switching losses. INTRODUCTION The multilevel inverter includes an array of power semiconductor devices and capacitors voltage sources, the output of which generates voltages with stepped waveforms. The computation of the switches permits the addition of the capacitors voltages to obtain high-voltage at the output, while the power semiconductors have to withstand only reduced voltages. We can observe a two-level inverter generates an output voltage with two values (levels) with respect to the negative terminal of the capacitor. While three and level inverter generates three voltages, and a nine-level inverter generates a nine-level output voltages. In all these cases devices are not arranged in series but they are arranged in such way that, they gain the capability to generate such kind of voltages. Herein, we should remember one important thing i.e. as the number of steps increases in the output waveforms; harmonic content comes down. Thus power quality of such waveforms will increase drastically. However, in order to generate step kind of waveforms in the output side, different Multilevel based archetypes are successfully built and verified. But the general principle of multilevel inverters is the synthesis of the AC voltage from several different voltage levels on the DC bus. As the number of voltage levels on the input DC side increases, the output voltage adds more steps which approach the sinusoidal wave research work.

2015

Abstract—Multilevel inverters offer several advantages compared to the conventional 3-phase bridge inverter in terms of lower dv/dt stresses, lower electromagnetic compatibility, smaller rating and better output features. This paper deals with study of Three Phase Two Level, Three Level and Five Level Voltage Source Inverter (VSI). The Three Level and Five Level are realized by Neutral point clamped (NPC) or Diode clamped (DC) inverter using Sinusoidal pulse width modulation (SPWM) technique. Similarly three phase VSI (two level) is also simulated using SPWM technique. SPWM technique is one of the most popular PWM techniques. Now-a-days harmonic reduction using SPWM is most popularly used in industries for a Variable Frequency Drives (VFDs). All the circuits are implemented using MATLAB software and their outputs are shown in figures step by step. Finally, this paper compares all the three inverters i.e., Two Level, Three Level and Five Level based on the total harmonic distortion o...

2014

In recent years, industry has begun to demand higher power equipment, which now reaches the megawatt level. Controlled ac drives in the megawatt range are usually connected to the medium-voltage network. Today it is hard to connect a single power semiconductor switch directly to medium voltage grids. For these reasons a new family of multilevel inverters has emerged as the solution for working with higher voltage levels. They can generate output voltages with extremely low distortion and lower dv/dt, they draw input current with very low distortion, they generate smaller common mode voltage and they can operate with a lower switching frequency. Because of these features worldwide research and development of multilevel inverters is occurring. In this report the simulation results and its comparison of diode clamped 3 levels and 5 level inverter has been shown.

Multilevel inverters have become more popular over the years in high power electric applications without use of a transformer and with promise of less disturbance and reduced harmonic distortion. This work proposes three phase Seven level Diode Clamped Multilevel Inverter (DCMLI) to simulate various modulating techniques for induction motor load. These Pulse Width Modulation (PWM) techniques include Carrier Overlapping (CO) strategy, Variable Frequency (VF) strategy, Phase Shift (PSPWM) strategy and Sub-Harmonic Pulse Width Modulation (SHPWM) i.e. Phase Disposition (PD) strategy, Phase Opposition Disposition (POD) strategy and Alternate Phase Opposition Disposition (APOD) strategy. The Total Harmonic Distortion (THD), VRMS (fundamental), crest factor, form factor and distortion factor are evaluated for various modulation indices. Simulation is performed using MATLABSIMULINK.

2013

A multilevel inverter have become more popular over the year. multilevel inverter can eliminate the need for the step-up transformer and reduce the harmonics produced by the inverter. Although the multilevel inverter structure was initially introduced as a means of reducing the output waveform harmonic content, it was found that the dc bus voltage could be increased beyond the voltage rating of an individual power device by the use of a voltage clamping network consisting of diodes. By using voltage clamping techniques, the system KV rating can be extended beyond limits of an individual device. This work proposes three phase Diode Clamped Multilevel Inverter (DCMLI) to various modulating techniques. These pulses Width Modulation (PWM) techniques include phase Disposition (PD), phase opposition Disposition (POD).Simulation is performed using MATLAB – SIMULINK .It is observed that PODPWM method provide output with relatively low harmonics distortion at the inverter output. Simulation ...

Kufa Journal of Engineering, 2018

At the high power switching circuit's applications, when the harmonic distortion is harmful, a multi-level diode clamped inverter is useful, especially when reduced total harmonic distortion and high power are desired. But when the levels get a rise, number of semiconductors are also rising, which leads to many problems such as increasing cost, losses, installation area, and total harmonic distortion. Many researchers have tried to find solutions to these problems. In this sense, this paper focuses on: a) build a new structure of five level diode clamped inverter. b) Increase the efficiency of the inverter by reducing the number of switches. c) Reduce the total harmonic distortion. The theoretical calculation and simulation results are performed for five level diode clamped inverter by MATLAB/ SIMULINK.

At present, multilevel inverters are extensively used in industries for high power and high voltage applications. Two categories into which inverters can be broadly classified are two level inverters and multilevel inverters. The multilevel began with the three level converters. One advantage that multilevel inverters have compared to two level inverters is minimum harmonic distortion. This paper deals with study and analysis of three level diode clamped MOSFET based inverters and its applications in industries. The main purpose of the paper is to study and implement 3 level diode clamped inverter using MOSFET's, the PWM signals used to switch these MOSFET's has been generated using PWM IC HEF4752VP. However, the output voltage is smoother with a three level converter, these results in smaller harmonics, but on the other hand it has more components and it is little complex to control in hardware. 

International Journal of Engineering, 2017

In this paper, a 7-level Diode Clamped Multilevel Inverter (DCMLI) is simulated with three different carrier PWM techniques. Here, Carrier based Sinusoidal Pulse Width Modulation (SPWM), Third Harmonic Injected Pulse Width Modulation (THIPWM) and Modified Carrier-Based Space Vector Pulse Width Modulation (SVPWM) are used as modulation strategies. These modulation strategies include Phase Disposition technique (PD), Phase Opposition Disposition technique (POD), and Alternate Phase Opposition Disposition technique (APOD). In all the modulation strategies, triangular carrier and trapezoidal triangular carrier signals are compared with reference signal, then control pulses are generated. The detailed analysis of the results has been presented and compared with experimental results in terms of fundamental component of output voltage and percent of THD.

IRJET, 2020

This paper presents, a design of single phase Half-height neutral point clamped (NPC) multilevel inverter with optimum total harmonic distortion (THD). The offered inverter topology is explained with the help of a single phase eleven-level inverter. Compared to traditional topologies such as a cascaded H-bridge converter, Diode Clamped converter, Flying Capacitor converter and NPC converter, the proposed inverter consists of a single dc voltage source, a single phase full bridge cell, switching devices and power diodes half in number. Due to the less number in switching devices the conduction losses will decreases, there by efficiency improves, and also the size and weight of the multilevel inverter are decreases. The switching signals were generated using Equal Phase (EP), Half Equal Phase (HEP), Feed Forward (FF) and Half Height (HH) methods. The proposed single phase inverter has been simulated through MATLAB/Simulink.

The main objective of this paper is to control the speed of an induction motor by using seven level diode clamped multilevel inverter. To obtain high quality sinusoidal output voltage with reduced harmonics. The proposed Scheme for diode clamped multilevel inverter is multicarrier SPWM control. An open loop speed control can be achieved by using V/ƒ method. This method can be implemented by changing the supply voltage and frequency applied to the three phase induction motor at constant ratio. The proposed system is an effective replacement for the conventional method which has high switching losses, as a result a poor drive performance. The simulation result portrays the effective control in the motor speed and an enhanced drive performance through reduction in total harmonic distortion (THD). The effectiveness of the system is verified through simulation using PSIM6.1 simulink package.

International Journal of Electrical and Computer Engineering (IJECE), 2017

The Market for photovoltaic cells (PV) has grown fast due to a higher demand on PV applications. However, there are still the transport and connection problems of the PV systems to the grid because of the difference in the current form. To assure the adequate connection between the PV sources and the network, the conversion of direct current (DC) to an alternative current (AC) is required and provided by an electronic device known as the inverter. In this last years, the conventional inverter structure reached its limits in power level and conversion performance. The multilevel inverter (MLI) structure was introduced and widely used in high power and high voltage applications to solve the conventional inverter limitation problem. In this paper, the Neutral-Point-Clamped (NPC) topology of the MLI was simulated to evaluate the effect of modulation index variation of the control technique on the harmonic behavior of the fifteen-level NPC. The simulation results were useful for the optimization of the MLI control technique toward the decrease of the harmonic (THD) effect on the NPC MLI. 1. INTRODUCTION Photovoltaic (PV) systems world market know a fast growth during the last year due to the necessity of developing the renewable energy to replace the fossil fuels [1]. However, this rapid growth required in parallel the improvement of the PV chain efficiency such as the PV generator energy yielding, the electrical power transport performance and the adequate connection to the grid [2]. One of the important parts of the conversion chain devices is the inverter which allows the conversion of DC signal to AC signal in purpose to permit the distribution and connection of the output electrical energy of the PV generator to the network [3]. In addition to PV conversion chain, inverters are used in power system applications and uninterrupted power supplies industries [4]. The inverters power efficiency to feed the different type of loads of the grid reach the max level and it is due to the increase of inductive load usage. More inductive loads mean more harmonics and less conversion efficiency [5]. Improvement of the output power quality of the inverter required reducing its total harmonic distortion (THD) content and decrease the size of the filter used [6]. As a solution for this requirement, a new family of the inverter has emerged and known as the multilevel inverter [7]. Multilevel Inverter (MLI) technology assures some advantages comparably to the conventional technology and deals with higher power applications which make it much easier to deal with lower power applications such as the PV systems [8-19]. One of the main advantages of the MLI structure is the improvement of the output voltage waveform by approaching the sinusoidal waveform which implicates reducing the harmonic stress

2013 IEEE Conference on Clean Energy and Technology (CEAT), 2013

This paper discusses a concept of two types multilevel inverters including of Cascaded H-Bridge and Diode-Clamped for harmonic reduction on high power applications. Normally, multilevel inverters can be used to reduce the harmonic problems in electrical distribution systems. These studies focused on the performance and analysis of a three phase multilevel inverters including Cascaded H-Bridge and Diode Clamp based on SPWM approaches. Based on the various simulations on nine levels of multilevel inverters, we found that the Total Harmonics Distortion for voltage (THD V ) output for both multilevel inverters is decreased. It also produces lower contents based on the IEC standard. Index Term -Multilevel inverter, diode clamped (NPC), H-Bridge inverter (CHB), SPWM.