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2010
NASA Tech Briefs, September 2010 The Consultative Committee for Space Data Systems (CCSDS) Advanced Orbiting Systems (AOS) space data link protocol provides a framing layer between channel coding such as LDPC (low-density parity-check) and higher-layer link multiplexing protocols such as CCSDS Encapsulation Service, which is described in the following article. Recent advancement in RF modem technology has allowed multi-megabit transmission over space links. With this increase in data rate, the CCSDS AOS protocol implementation needs to be optimized to both reduce energy consumption and operate at a high rate. CCSDS AOS has been implemented as an intellectual property core so that the aforementioned problems are solved by way of operating the CCSDS AOS inside a field-programmable gate array (FPGA). The CCSDS AOS in FPGA implementation consists of both framing and deframing features. Features of the AOS Framer include: • Fully customizable with respect to insert zone, virtual channel ...
End-to-end space communication architectures must connect system elements that may be in space, on the ground in mission operations centers, or are shared assets such as ground communications stations. End-to-end connectivity involves space communications over RF links, but also cross support services, terrestrial network circuits, and a variety of application layer protocols for commanding, telemetry, and mission operations. CCSDS has developed a large suite of interoperable, and cross-supportable, protocols for these purposes. Each of these defines a specific " layer " of functionality, such as: RF modulation, space link error coding, cross support frame delivery, or network layer routing. CCSDS has recently published a Space Communication Cross Support Architecture Requirements Document (SCCS-ARD) that describes how many of these standards fit together and how they are intended to be used. This paper provides an overview of this document, presented so as to explain the concepts so that others may use them. These concepts will be described from several key viewpoints.
Acta Astronautica, 2020
In the last few years, satellite on-board data handling bandwidth requirements grew significantly, as well as production volume of these systems. A series of different protocols currently try to answer this need. In particular, the European Space Agency developed an open protocol solution: SpaceFibre. The SpaceFibre protocol can sustain a line rate of 6.25 Gb/s per lane (up to 16 lanes). It offers advanced and flexible Quality-of-Service features, as well as Fault Detection Isolation and Recovery services. The protocol structure has been developed so that full hardware implementation of its core layers is straightforward, granting high performances at low price in terms of complexity and power consumption, one of the most stringent requirements in space applications. In this paper, a FPGA implementation on both rad-hardened (RTAX2000, RTG4, Virtex-5) and commercial (ZYNQ 7000) devices of the SpaceFibre CODEC is presented together with its verification environment and a hardware validation setup. Particular attention is given to the trade-off between resources utilisation, power consumption and CODEC configurations, in order to enable future system adopters to efficiently explore the design space.
AAIA, 2018
The ever increasing computing power of processors for consumer electronics and information technology at an ever decreasing cost makes it possible to envision new software radio architectures. After the first stride forward of FPGA based reconfigurable platform, mid-end class servers running full Software Defined Radio (SDR) solutions should be the next step towards flexibility and scalability. However running well-known Earth Observation or small sat payloads demodulator on GPP remains a difficult challenge. In this article a complete V cycle design of a CCSDS demodulator will be discussed, using the popular GNU-Radio open source environment. A first architecture will be proposed to process in real-time, from digitizer to CCSDS RAF service, the 114 Mbps channel rate (after the serial concatenated codes-convolutional and Reed-Solomon) OQPSK payload of a LEO satellite in S band taking into account real life constraints such as Doppler shift, Doppler ramp and link budget. In addition, this SDR architecture can be proposed for new kind of telemetry demodulators dedicated to launchers and located far from the receiving antenna station. Benchmarks, architectures, hardware resources and Ethernet constraints will be discussed from the antenna foot digitizer up to CCSDS CADU processing. The network will offer new ways to distribute the processing, anywhere on the building. This flexibility has a cost and can require a specific attention.
IEEE Transactions on Aerospace and Electronic Systems, 2017
The ongoing evolution in constellation/formation of CubeS ats along with steadily increasing number of satellites deployed in Lower Earth Orbit (LEO), demands a generic reconfigurable multimode communication platforms. As the number of satellites increase, the existing protocols combined with the trend to build one control station per CubeS at become a bottle neck for existing communication methods to support data volumes from these spacecraft at any given time. This paper explores the S oftware Defined Radio (S DR) architecture for the purposes of supporting multiple-signals from multiple-satelli tes , deploying mobile and/or distributed ground station nodes to increase the access time of the spacecraft and enabling a future S DR for Distributed S atellite S ystems (DSS). Performance results of differing software transceiver blocks and the decoding success rates are analysed for varied symbol rates over different cores to inform on bottlenecks for Field Programmable Gate Array (FPGA) acceleration. Further, an embedded system architecture is proposed based on these results favouring the ground station which supports the transition from single satellite communication to multi-satellite communications. Index Terms-Central Processing Unit (CPU), Field Programmable Gate Array (FPGA), S atellite communication, S oftware Defined Radio (S DR), S ystem-on-chip (S oC). I. INTRODUCTION MALL satellites are fast becoming a way to perform scientific and technological missions more affordably due to reduced build time, more frequent launch opportunities, larger variety of missions, more rapid expansion of the technical and/or scientific knowledge base and greater involvement of small industries/universities [1, 2]. Furthermore, there is an ongoing evolution of multiple small satellite scenarios such as FLOCK-1 [3], QB50 [4], Autonomous Assembly of a Reconfigurable Space Telescope (AAReST) [5], Surrey Training Research and Nano-Satellite Demonstrator (STRaND-2) [6] and Edison Demonstration of Smallsat Network (EDSN) [7]. The objectives of these missions are very ambitious and are driven by new complexities which require multi-mode operation of wireless transceivers [8].
2015
Two standardization bodies are currently actively working in the field of space links communication protocols: CCSDS and DVB. These two bodies have developed and specified a series of channel coding and modulation techniques which specifically address the specificities and constraints of space links. Nevertheless, CCSDS and DVB standards differ in many instances because they try to answer different system requirements. The aim of this paper is to present an overview of those techniques with performance comparison between CCSDS and DVB as far as channel coding and modulation are concerned. 1.
2006 IEEE Annual Wireless and Microwave Technology Conference, 2006
This study defines a hardware architecture approach for software defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general purpose processors, digital signal processors, field programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs) in addition to flexible and tunable radio frequency (RF) front-ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and interfaces. The modules are a logical division of common radio functions that comprise a typical communication radio. This paper describes the architecture details, module definitions and the typical functions on each module as well as the module interfaces. Trade-offs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify the internal physical implementation within each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.
Aerospace …, 2006
IP Networking over …, 2008
Broadband satellite will play an important role to provide universal broadband access for the users.
Computer Networks, 2007
The rising demand for multimedia services even in hazardous environments, such as space missions and military theatres, and the consequent need of proper internetworking technologies have revealed the performance limits experienced by TCP protocol over long-delay and lossy links and highlighted the importance of the communication features provided by the protocol architectures proposed by the Consultative Committee for Space Data Systems (CCSDS). This paper proposes a CCSDS File Delivery Protocol (CFDP) extension, based on the implementation of erasure coding schemes, within the CFDP itself, in order to assure high reliability to the data communication even in presence of very critical conditions, such as hard shadowing, deep-fading periods and intermittent links. Different encoding techniques are considered and various channel conditions, in terms of Bit Error Ratio and bandwidth values, are tested.
2009 Fourth International Conference on Systems, 2009
This paper gives an overview of development and prototyping of a radio interface designed for high data rate Wireless Sensor Networks (WSN) using a top down approach. An aerospace application of this work is presented to underline the importance of rapid and flexible prototyping. Single Carrier Frequency division multiple Access (SC-FDMA), with a very low Peak Average Power Ratio (PAPR), is a promising alternative to the OFDM scheme for highly power constraint applications, however, it is still not well explored. The chosen radio interface will be tested by means of Electronic System Level (ESL) synthesis and Field Programmable Gate Array (FPGA) prototyping. The ESL development is based on the tool "Synplify DSP", which allows quick prototyping and makes it possible to do real measurements, thus increasing the knowledge about the propagation channel to update the model and algorithm.
2000
This paper is concerned with the implementation of a small satellite on-board computer (OBC) on a single programmable logic chip and with the development of a software communication system for it. The communication system is based on the CCSDS protocol, which is a standard communication protocol in the space industry. Integration of soft intellectual property cores forming a main subsystem
IEEE Transactions on Aerospace and Electronic Systems, 2019
Satellite backbone networks provide a viable means of establishing broadband connectivity for remote, sparsely populated areas. In addition, satellite communication systems are well suited for airborne, maritime, and disaster relief environments. Technologies for links are continuing to improve in performance and power efficiency, making onboard regeneration and routing feasible within spacecraft power envelope. In this article, we implement and analyze a spaceborne router design integrated on a field-programmable gate array (FPGA). FPGA provides a flexibility needed to circumvent space radiation effects on chip circuitry, as they can be reconfigured at runtime. We explored scalability of the high-end state-of-the art FPGA chip family, and its ability to support high bit-rate satellite links: 10 Gbps satellite-to-ground links and 100 Gbps intersatellite links. Through implementation and testing, we confirm that the current FPGA technology can support space routers with very high data throughput.
2016
Low-density parity-check (LDPC) encoder and decoder is implemented in this paper. LDPC codes are the most powerful ECC. CCSDS standard recommends LDPC code with various code rates out of which LDPC with code rate of 7/8 is very advantageous in high data rate space missions due to low bandwidth overhead. LDPC is a quasi cyclic code with 511x511 base circulant matrices. A generic hardware architecture based on SRAA (Shift Register Adder Accumulate) encoder architecture for quasi cyclic codes is proposed in this paper. LDPC encoder encodes the data and sends it to the channel. Bit Flipping Algorithm is applied for decoding of received data. It detects and corrects the error. At the end, simulation verifies the detection and correction of errors.
2015 IEEE Aerospace Conference, 2015
The structure of candidate next-generation integrated communication architectures for space communications and navigation address technologies, architectural attributes, mission services, and communications capabilities is improved by using software defined radios (SDRs). Evaluating lessons learned from development and operation of the early space SDRs on the NASA Space Communications and Navigation (SCaN) Testbed on the International Space Station (ISS) provide feedback for defining the communications architecture. An important attribute is leveraging SDR reconfigurability, which can be changes the way that operations are conducted.
2009
International audienceThis paper gives an overview of development and prototyping of a radio interface designed for high data rate Wireless Sensor Networks (WSN) using a top down approach. An aerospace application of this work is presented to underline the importance of rapid and flexible prototyping. Single Carrier Frequency division multiple Access (SC-FDMA), with a very low Peak Average Power Ratio (PAPR), is a promising alternative to the OFDM scheme for highly power constraint applications, however, it is still not well explored. The chosen radio interface will be tested by means of Electronic System Level (ESL) synthesis and Field Programmable Gate Array (FPGA) prototyping. The ESL development is based on the tool "Synplify DSP", which allows quick prototyping and makes it possible to do real measurements, thus increasing the knowledge about the propagation channel to update the model and algorithm
AIP Conference Proceedings 2226, 2020
The Consultative Committee for Space Data Systems (CCSDS) recommends AES algorithm as a cryptographic algorithm to maintain confidentiality and data security between spacecraft and ground systems. In implementation, there are several AES algorithm operating modes including Cipher-Block Chaining (CBC), Electronic Codebook (EBC), Cipher Feedback (CFB), Output Feedback (OFB), and counter mode (CTR). One of the operating modes of AES algorithm recommended by CCSDS is CTR because it has advantages in terms of efficiency of implementation and offers a high level of data security. LAPAN-A4 as the next generation of LAPAN satellites also uses CCSDS standard in terms of data exchange between satellites and ground stations including telemetry and telecommand (TTC) data and satellite payload data. In order to protect LAPAN-A4 satellite data, especially TTC data, in this paper AES algorithm was implemented in CTR operating mode on the FPGA which will then be implemented on LAPAN-A4 satellite onboard data handling (OBDH) as one of LAPAN-A4 satellite data security systems. To overcome the limited resource of FPGA, optimization is also done using basic iterative AES hardware reused method, which is to reuse hardware that has been designed n times for same operation for AES algorithm. From the results of implementation and optimization, efficiency of logic gates used is increasing almost a quarter less than the previous research.
1990
The High-Perform ance Com puting Initiative from the W hite House Office of Science and Technology Policy has defined 20 m ajor challenges in science and engineering which are dependent on the solutions to a num ber of high-perform ance com puting problem s. One of th e m ajor areas of focus of this initiative is the developm ent of gigabit rate networks to be used in environm ents such as the space station or a N ational Research and Educational Network (NREN). T he strategy here is to use existing network designs as building blocks for achieving higher rates, with the ultim ate goal being a gigabit ra te network. Two strategies which contribute to achieving this goal are examined in detail. 1 FD D I2 is a token ring network based on fiber optics capable of a 100 Mbps rate. Both m edia access (MAC) and physical layer modifications are considered. A m ethod is pre sented which allows one to determ ine maximum utilization based on the token-holding tim er settings. Simulation results show th at employing the second counter-rotating ring in com bination with destination removal has a m ultiplicative effect greater than the effect which either of the factors have individually on perform ance. Two 100 Mbps rings can handle loads in the range of 400 to 500 Mbps for traffic w ith a uniform distribution and fixed packet size. Perform ance is dependent on the num ber of nodes, im proving as the num ber increases. A wide range of environm ents are exam ined to illustrate robustness, and a m ethod of im plem entation is discussed. 'T h i s w ork w as su p p o rte d b y C IT g ra n t R F-89-002-01, N A SA g r a n t N A G -1-908 and Sun M icrosystem g r a n t R F 596043. 2F ib e r D istrib u te d D a ta In terfa ce (F D D I) is an A m erican N a tio n a l S ta n d a rd s In s titu te s ta n d a rd for token ring netw orks.
Goddard Space Flight Center actively participated in the mid 90's in an effort to standardize a lossless data compression algorithm for space applications. As the standard effort progressed, implementation in Application Specific Integrated Circuit (ASIC) was initiated for high throughput applications. Eventually, a radiation hardened circuit was fabricated to function at over 20 Msamples/sec. Implementation of new technologies into space missions has always met resistance. The mentality of "If it works, why needs change?" prevails in aerospace community. The notion of "not-invented-here", or otherwise known as NIH disease further hampers progress. The first real mission application at GSFC of the lossless standard was for a small explorer, the Sub-millimeter Wave Astronomy Satellite (SWAS-1999) that needed to overcome insufficient onboard storage capacity. Subsequent mid-class explores for space science missions, Imager for Magnetopause-to-Aurora Global Exploration (IMAGE-00), Microwave Anisotropic Probe (MAP-01), followed. These implementations are all software based.
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