New bridge 9-level Inverter

2021

Recently presented topologies accomplish a greater number of yield voltage with a smaller count of semiconductors tools, dc signals. Lessening of switches and DC signals declines the prize, features, many-sided quality and upgrades general execution. Improved topology can deliver more levels of yield voltage with 7 switches as it were. Also, huge lessening in voltage worry over the switches can be accomplished. A near investigation of upgraded topology with the traditional topology and as of late distributed topologies has been made as far as different switches, control diodes, circuit prerequisite, DC voltage signals and other voltage. Multi-bearer beat width tweak technique is embraced for creating the exchanging beats. Recreation investigation of the improved topology has been completed utilizing Matlab/Simulink

IAEME PUBLICATION, 2020

This paper presents a new circuitry for multilevel inverter which was designed by using less number of DC sources(4 batteries). Also the number of switches were reduced and IGBT were used as switches. The design is a modification of cascaded H-BridgeiMultilevel inverter. The steps in the output wave follow the equation 2k+1, where k is the number of DC sources. Since the number of steps is increased, the resemblance of the output waveform to the sinusoidal wave is also increased, thereby increasing the efficiency of the system, as compared to the previous models of multilevel inverter. 9 level voltage output is obtained from 4 DC sources. As the number of swtiches are reduced, the dV/dt losses, and harmonic distortions are also reduced. The experimental setup is validated using a simpleiresistive load.

In the class of inverters, multi-level topology is best suited since it has capability generated output wave nearest to the sine wave. Multi-level can be designed using numerous inversion topologies. But among all the topologies Cascaded H-Bridge (CHB) finds widest range of applications since it has the minimal component requirement and the compact circuit design. As the inversion level increases, the DC-bus requirement also increases in case of CHB. This limits its application for higher voltage levels. This paper presents the modified CHB topology which not only reduces the source requirement for each H-type cascaded circuit of CGB, but also reduces the switch requirements to generate the nine-level voltage output. Modification is done both in switching techniques as well as in the switch arrangement of each H-unit. The switching technique used for Modified CHB (MCHB) is sinusoidal carrier wave pulse width modulation i.e. SPWM with frequency shift and phase shift topologies both. While in case of conventional topology, pulse generator is used to generate gate pulses. A comparative analysis is presented in terms of harmonic percentages in case of conventional and MCHB topologies.

International Journal of Power Electronics and Drive Systems (IJPEDS), 2021

In this paper, a single-phase nine-level multilevel inverter (MLI) topology is created in which reduced number of switches, diodes and gate driver circuits can be used so as to obtain higher output voltage levels. Due to this configuration, the blocking voltage value across the switches will also get reduced. In this proposed single-phase MLI topology, increase in output voltage levels can be observed whenever there is increment in the number of switches in the configuration. Proper mathematical modeling and analysis of the voltage waveform of the proposed inverter have been done for a 9-level MLI. MATLAB platform is used for modeling and simulation of the MLI. Modulation index is varied in order to observe various outcomes through simulation. The proposed nine-level inverter configuration is experimentally evaluated in the laboratory for various modulation indices so as to validate the simulation results. Comparison of this topology is done with the classical MLIs in order to illustrate its advantages.

International Journal of Innovative Technology and Exploring Engineering, 2019

In the couple of years, the demand of multilevel inverter has expeditiously increased in the field of utilization of electrical energy. Because the multilevel inverter is a key technology to integrate the different renewable energy sources (wind, solar etc) with the grid. In this research work, authors have configured a novel topology of nine level multilevel inverter has less number of switches with dc voltage sources. The presented approach has been designed to 9-level inverter with seven unidirectional switches with voltage sources. It comprises of an H-bridge which synthesize to ac voltage by utilizing almost all possible additive and subtractive cases of the voltage sources with its combinational power switches and generated optimal firing angles using selective harmonic elimination method with Genetic Algorithm to decrease the lower order harmonic present in the output voltage of the, which supplied by the presented nine-level inverter. It has been concluded that presented app...

Energies

This article presents an innovative switched-capacitor based nine-level inverter employing single DC input for renewable and sustainable energy applications. The proposed configuration generates a step-up bipolar output voltage without end-side H-bridge, and the employed capacitors are charged in a self-balancing form. Applying low-voltage rated switches is another merit of the proposed inverter, which leads to extensive reduction in total standing voltage. Thereby, switching losses as well as inverter cost are reduced proportionally. Furthermore, the comparative analysis against other state-of-the-art inverters depicts that the number of required power electronic devices and implementation cost is reduced in the proposed structure. The working principle of the proposed circuit along with its efficiency calculations and thermal modeling are elaborated in detail. In the end, simulations and experimental tests are conducted to validate the flawless performance of the proposed nine-lev...

This paper demonstrates how the reduced harmonic distortion can be achieved for a new topology of multilevel inverters. The new topology has the advantage of its reduced number of devices compared to conventional cascaded H-bridge multilevel inverter, and can be extended to any number of levels. The modes of operation are outlined for 5-level inverter, as similar modes will be realized for higher levels. Simulations of seven level of the proposed inverter topology along with corroborative experimental results are presented. This paper deals with the analysis and simulation of the seven level inverter. This paper presents the seven level inverter with harmonics reduction along with the reduction.. The harmonic reduction is achieved by selecting appropriate switching angles. The functionality verification of the seven level inverter is done using MATLAB.

In this paper, a novel topology for single-phase 7-Level inverter is introduced. Structural parts of the inverter are described in detail. Switching strategy and operational principles of the proposed inverter are explained and operational topologies are respectively given. A method and a formula are improved for calculating switching angles. The validity of the proposed inverter is verified through simulations. Simulation results are given and compared with conventional H-Bridge Inverter. Simulations for 15-Level and 31-Level inverters are also performed for comparison and improving proposed inverter for the future work. A prototype of the proposed inverter is manufactured and experimental studies are realized. The proposed inverter generates a high-quality output voltage wave form. It reduces dv/dt stresses imposed on power-switching devices and also harmonic components of output voltage and load current quite well.

TELKOMNIKA Telecommunication Computing Electronics and Control, 2018

In this paper a new single-phase multilevel inverter topology is presented. Proposed topology is capable of producing nine-level output voltage with reduce device counts. It can be achieved by arranging available switches and dc sources in a fashion such that the maximum combination of addition and subtraction of the input dc sources can be obtained. To verify the viability of the proposed topology, the circuit model is developed and simulated in Matlab-Simulink software. Experimental testing results of the proposed nine-level inverter topology, developed in the laboratory, are presented. A low frequency switching strategy is employed in this work. The results show that the proposed topology is capable to produce a nine-level output voltage, capable in handling inductive load and yields acceptable harmonic distortion content.

IEEE CONFERENCE, 2017

In this paper, a nine level multilevel inverter is proposed. The proposed nine-level inverter generates a nine levels Ac output voltage with the appropriate gate balanced across the series connected capacitors. The switching losses and the voltage stresses of power devices can be reduced in the proposed nine-level inverter. The operating principles of proposed inverter are discussed. The proposed multilevel inverter needs a single Dc voltage source with a series connection of four capacitors, three diodes, five acting switches for synthesizing output voltage levels and an H-bridge cell. Thus the proposed nine-level inverter helps in reducing the number of independent dc voltage sources and switches. Also the harmonic content in the output voltage is very less when compared conventional topologies. The proposed topology is verified by using MATLAB/Simulink.