Interactive High-Performance Processor Understanding via the Web

The discrete-event simulation language Pearl, which is specifically designed for simulating computer architectures, features a strong statistical analysis engine. However, the output of this engine is text-based and postmortem. In this paper, we introduce a flexible graphical user interface support library for Pearl, addressing the runtime visualization of computer architecture simulations. The hierarchial structure of the library is highlighted and, with the help of a case study that was extracted from previous work, the merits of the library are presented. Architecture level Application level Machine parameters Architecture X Architecture Y Visualization and analysis tools Abstract application model generator Architecture independent simulation models Architecture Operation-trace

Computer, 1995

Superscalar processor design requires increasingly sophisticated software tools. The visualization-based microarchitecture workbench described here addresses weaknesses common to most performance simulators: the lack of retargetability, visualization support, and interactive control.

Workshop On Computer Architecture Education, 2006

Two of the most important design issues for modern processors are power and performance. It is important for students in computer organization classes to understand the tradeoff between these two issues. This paper presents PSATSim, a graphical simulator that allows student to con- figure the design of a speculative out-of-order execution su- perscalar processor and see the effect of the

2004

The purpose of this article is to provide an introduction to the SuperSim simulator for ILP processors as a teaching tool for computer architecture related courses. It presents the various aspects of the simulator, including the user interface, the instruction set, the configuration possibilities and applications. The main focus is on the educational usage of the simulator, through the experience gained in its actual application.

ACM SIGAPL APL Quote Quad, 1989

Courses in computer architecture, among other things, must address issues of CPU design and microprogramming. Real environments, if even available, provide very specialized, vendor specific architecture solutions. Computer architecture for this reason is often approached without the benefit of any hands-on experience. Simulation obviously provides a means of exploring "new" architectures. However, simulation tools in the architecture area tend to be highly specialized, typically dictating CPU design and microprogramming organization. If engineering-level concerns of speed or timing considerations are not at issue, APL provides a uniquely effective base for building a general simulation tool to implement both mundane and exotic microprogrammable CPU designs. The authors have conceived and developed such an environment using APL. Both students and instructor can use the simulation toolkit to "implement" CPU designs or install an existing CPU architecture. The user ...

Modern microprocessors achieve high p erformance through the use of speculative execution and mechanisms to exploit instruc- tion level parallelism. Performance evaluation of such architec- tures is generally made using d etailed, cycle-by-cycle simula- tion. Since detailed simulation is s low, the design o f r ecent simulators has been focused on developing fast simulation en- gines. However, these optimized simulators are difficult t o modify or extend. In addition, intensive benchmarking is re- quired to v alidate simulation performance results. This task consumes a significant amount of time even if very fast simula- tors are used. This paper presents a novel simulation environment to study high p erformance microarchitectures. This environment con- sists of an extensible simulator for superscalar architectures and a group o f utilities to p erform benchmarking in p arallel. The new simulator developed has features that are not found in other simulators reported in the literatur...

Journal of Visual Languages & Computing, 1992

Novis, an experimental visual environment which supports the interactive development and animated simulation of special purpose parallel architectures, is presented. In sharp contrast with other systems which concentrate on the representation of parallelism within programs, Novis lets users design networks at an abstract level by placing processing elements into a connected grid of arbitrary (user selected) shape. The environment's underlying philosophy of maximal information hiding makes it unnecessary for the user to be intimately familiar with the details of low{level issues such as process schedule maintenance and event dispatching. Layout violations and exceptions detected during execution simulation (e.g., deadlock) are automatically reported to the user.

2008 38th Annual Frontiers in Education Conference, 2008

Processor implementation and performance analysis are fundamental in computer architecture education. A processor can be described at different abstraction levels: a black box with inputs and outputs, the composition of RT (Register-Transfer) level components, the composition of gate level components, etc. Performance of a processor is impacted by factors such as clock cycle, programs, and components' propagation delays. With the traditional text-based educational material, teaching and learning of the processor implementation is difficult. Processor simulation offers an effective way for education through dynamic visualization and flexible experimentation. This paper presents a MIPS32 Processor Simulator that models the single-cycle, multi-cycle, and pipeline processors described in the classic textbook, "Computer Organization and Design: The Hardware/Software Interface" written by Patterson and Hennessy. The Simulator is developed in DEVSJAVA simulator, a realization of the Discrete Event System Specification with support for modeling parallel, hierarchical, and component-based systems.

ACM SIGMETRICS …, 2004

High-level hardware modeling via simulation is an essential step in hardware systems design and research. Despite the importance of simulation, current model creation methods are error prone and are unnecessarily time consuming. To address these problems, we have publicly released the Liberty Simulation Environment (LSE), Version 1.0, consisting of a simulator builder and automatic visualizer based on a shared hardware description language. LSE's design was motivated by a careful analysis of the strengths and weaknesses of existing systems. This has resulted in a system in which models are easier to understand, faster to develop, and have performance on par with other systems. LSE is capable of modeling any synchronous hardware system. To date, LSE has been used to simulate and convey ideas about a diverse set of complex systems including a chip multiprocessor out-of-order IA-64 machine and a multiprocessor system with detailed device models.

2001

Abstract: Alfa-1 is a simulated computer designed to be used in Computer Architecture and Organization courses. The DEVS formalism was used to attack the complexity of the design, allowing the definition of individual components that were later integrated into a modelling hierarchy. The goal of the toolkit is to allow the students acquiring some practice building hardware components. Here, we present the design and implementation of the tools, focusing in how to use them and how to extend the existing components. We also explain ...

The paper describes a system to design computer processors and to simulate their behaviour during the execution of assembly user programs. The system, called APE (Architecture Prototyping Environment), is based on a dynamic object oriented definition and use of processor components. After the user choice of the architecture components, the system builds a processor simulator allowing users to study the processor behaviour. The iterative process of modelling the computer architecture, prototyping the corresponding simulator and simulating its behaviour, makes the system particularly useful in the activity of teaching computer architectures.

Proceedings of the 1990 IEEE Workshop on Visual Languages, 1990

Novis, a visual environment which supports the interactive development and animated simulation of special purpose parallel architectures, is presented. In sharp contrast with other systems which concentrate on the representation of parallelism within programs, Novis lets users design networks at an abstract level by placing processing elements into a connected grid of arbitrary (user selected) shape. The environment's underlying philosophy of maximal information hiding makes intimate familiarity on the part of the user with the details of low{level issues such as process schedule maintenance and event dispatching unnecessary. Layout violations and exceptions detected during execution simulation (e.g., deadlock) are automatically reported to the user. An overview of Novis's features is followed by examples that show o the environment's capabilities in a variety of useful applications.

ICEE International …, 2007

Proceedings of the 37th annual IEEE/ACM …, 2004

Microprocessor simulators are very popular in re-search and teaching environments. For example, func-tional simulators are often used to perform architectural studies, to fast-forward over uninteresting code, to gener-ate program traces, and to ...

Proceedings of MASCOTS '96 - 4th International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 1996

Simulation is a powerful tool f o r studying behavior of novel architectures and improving their performance. Howevel; the time, effort and resources invested in developing a reliable simulator with the required level of detail may become prohibitively large. In this papel; we present a simulation platform specifically designed to simulate the class of multithreaded architectures. The most important features of this simulator are its jlexibility and ease of use. The simulation model provides the user with a wide range of design criteria, architectural parameters and workload characteristics. The simulation platform includes several tools, such as: an experiment planner, an interface to Matlab f o r processing and displaying results, and an intelface to PVM for the execution of independent experiments in parallel. The simulation model is validated by comparison of analytical and experimental results.