BER Analysis of Turbo Decoding Algorithms

Lecture Notes in Electrical Engineering, 2009

Indonesian Journal of Electrical Engineering and Computer Science

Thanks to the success of smart phones and mobile-ready laptops, data traffic has recently grown exponentially, and the demand for mobile data has risen very dramatically. These requests in large capacity can only be satisfied by a high efficiency and a very good optimization of the infrastructures of the mobile networks, while taking into account the constraints which are the power, bandwidth and a limited complexity. The task of developing mobile technologies has also evolved from a national or regional focus to a complex and growing mission, supported by global standards development organizations such as 3GPP (3rd Group Partnership Project). Through this research, we present everything related to the simulation of the 4G mobile network system (LTE), which can provide high data flow with good quality, through three model channels known as (EPA, EVA, ETU). In this work we focus on the block ‘iterative decoding channel encoder’ in the LTE system, where the iterative channel coding ca...

In order to have reliable communication, channel coding is often employed. Turbo code as a powerful coding technique has been widely studied and used in communication systems. Turbo coding is an advanced forward error c o r r e c t i o n a l g o r i t h m . U l t i m a t e Performance that approaches the Shannon limit requires a new approach using iteratively run soft in/soft out (SISO) decoders called turbo decoders. However, the implementation of various Turbo Decoders suffers from a large delay and high power consumption. For this reason, they are not suitable for many applications like mobile communication systems. In this paper, a comparative study has been made and various decoding algorithm used in SISO Turbo Decoders have been analyzed viz. MAP, Log-MAP, Max-Log-MAP and SOVA, to overcome this drawback. This paper examines the principles of turbo coding and decoding algorithms and compare their BER performance.

IEEE Transactions on Circuits and Systems I: Regular Papers, 2014

This work focuses on the VLSI design aspect of highspeed maximum a posteriori (MAP) probability decoders which are intrinsic building-blocks of parallel turbo decoders. For the logarithmic-Bahl-Cocke-Jelinek-Raviv (LBCJR) algorithm used in MAP decoders, we have presented an ungrouped backward recursion technique for the computation of backward state metrics. Unlike the conventional decoder architectures, MAP decoder based on this technique can be extensively pipelined and retimed to achieve higher clock frequency. Additionally, the state metric normalization technique employed in the design of an add-compare-select-unit (ACSU) has reduced critical path delay of our decoder architecture. We have designed and implemented turbo decoders with 8 and 64 parallel MAP decoders in 90 nm CMOS technology. VLSI implementation of an 8 parallel turbo-decoder has achieved a maximum throughput of 439 Mbps with 0.11 nJ/bit/iteration energy-efficiency. Similarly, 64 parallel turbo-decoder has achieved a maximum throughput of 3.3 Gbps with an energy-efficiency of 0.079 nJ/bit/iteration. These high-throughput decoders meet peak data-rates of 3GPP-LTE and LTE-Advanced standards. Index Terms-Bahl-Cocke-Jelinek-Raviv (BCJR) algorithm, maximum a posteriori (MAP) decoder, parallel turbo decoding and VLSI design, turbo codes, wireless communications, 3GPP-LTE/LTE-advanced.

International Journal of Computer Applications, 2012

Turbo codes are family of forward error correcting codes, whose performance is near Shannon limit. Turbo decoding is based on the maximum a-posterior algorithm (MAP) algorithm. In this paper, the problem of turbo decoding in ISI channel is studied. A Super-trellis structure method has been presented and modified turbo decoding is suggested. Two methods have been suggested for turbo decoding in ISI channel. In the first method, we take all possible combinations of output of encoder-2 and in method-2, output of each encoder is passed through channel filter independently. Method-2 performs better than method-1 but requires higher bandwidth. The improvement in performance is demonstrated through simulations.

Integration, the VLSI Journal, 2011

We present an efficient VLSI architecture for 3GPP LTE/LTE-Advance Turbo decoder by utilizing the algebraic-geometric properties of the quadratic permutation polynomial (QPP) interleaver. The highthroughput 3GPP LTE/LTE-Advance Turbo codes require a highly-parallel decoder architecture. Turbo interleaver is known to be the main obstacle to the decoder parallelism due to the collisions it introduces in accesses to memory. The QPP interleaver solves the memory contention issues when several MAP decoders are used in parallel to improve Turbo decoding throughput. In this paper, we propose a low-complexity QPP interleaving address generator and a multi-bank memory architecture to enable parallel Turbo decoding. Design trade-offs in terms of area and throughput efficiency are explored to find the optimal architecture. The proposed parallel Turbo decoder has been synthesized, placed and routed in a 65-nm CMOS technology with a core area of 8.3 mm 2 and a maximum clock frequency of 400 MHz. This parallel decoder, comprising 64 MAP decoder cores, can achieve a maximum decoding throughput of 1.28 Gbps at 6 iterations &

Proceedings of the 2001 international symposium on Low power electronics and design - ISLPED '01, 2001

The requirement of turbo decoding in 3G wireless standards has forced handset designers to consider power consumption issues in their implementations. The phenomenal performance of turbo codes comes at the expense of computation. Primarily this paper looks at methods of substantially reducing the power consumption for the decoding operation, making it feasible to integrate turbo decoders into a low power handset. The techniques presented include early termination of the turbo process, encoding of extrinsic information to reduce the memory size, and disabling portions of the MAP algorithm when the results will not affect the decoded output. The net result of these techniques is almost a 70% reduction in power over a fixed 6 iteration, 8-state baseline turbo decoder at 2 dB of signal to noise ratio (SNR).

Current Applied Physics, 2004

Turbo code with its performance close to the Shannon limit has been received a lot of interest for many applications. SW-MAP algorithm, a decoding scheme of the turbo code has a lot of advantage in the amount of memory storing the metric value, and in the operation performance with a small increase of calculation compared with the conventional MAP scheme. A turbo decoder complying with 3GPP specification is proposed. The structure of the decoder is modified to reduce the amount of memory of the input buffer, the metric memory, the interleaver and the deinterleaver though it is based on the SW-MAP scheme. The amount of memory is reduced by about 50% of the conventional SW-MAP decoding scheme using an address generation control scheme.

Turbo codes are a new class of forward error correcting codes that have proved to give a performance close to the channel capacity as proposed by C. Shannon. A turbo code encoder is formed by the parallel concatenation of two identical recursive convolutional encoders separated by an interleaver. The turbo code decoder utilizes two cascaded decoding blocks where each block in turn shares a priori information produced by the other. The decoding scheme has the benefit to work iteratively such that the overall performance can be improved. In this paper, a performance analysis of turbo codes is carried out. Log maximum a posteriori probability (Log-MAP) algorithm is used in the performance analysis. The effect of using different decoding schemes is studied on both punctured and unpunctured codes. Simulations are carried out with the help of MATLAB tools.

Journal of Advanced College of Engineering and Management, 2018

This paper presents a Thesis which consists of a study of turbo codes as an error-control Code and the software implementation of two different decoders, namely the Maximum a Posteriori (MAP), and soft-Output Viterbi Algorithm (SOVA) decoders. Turbo codes were introduced in 1993 by berrouet at [2] and are perhaps the most exciting and potentially important development in coding theory in recent years. They achieve near-Shannon-Limit error correction performance with relatively simple component codes and large interleavers. They can be constructed by concatenating at least two component codes in a parallel fashion, separated by an interleaver. The convolutional codes can achieve very good results. In order of a concatenated scheme such as a turbo codes to work properly, the decoding algorithm must affect an exchange of soft information between component decoders. The concept behind turbo decoding is to pass soft information from the output of one decoder to the input of the succeeding one, and to iterate this process several times to produce better decisions. Turbo codes are still in the process of standardization but future applications will include mobile communication systems, deep space communications, telemetry and multimedia. Finally, we will compare these two algorithms which have less complexity and which can produce better performance.

2016

1 PG Student, Dept. of Electronics and Communication Engineering, Rajeev Institute of Technology Hassan, Karnataka Email: [email protected] 2 Asst. Professor, Dept. of Electronics and Communication Engineering, Rajeev Institute of Technology Hassan, Karnataka Email: [email protected] ---------------------------------------------------------------------***--------------------------------------------------------------------Abstract In wireless communications, most of the fourth generation mobile systems with LTE (Long Term Evolution) standards are supporting data rates of 300Mbps but now-adays as the demand for high peak data rates has increased, LTE standards are emerging towards achieving data rates in terms of Gbps. This is accomplished by adopting efficient channel coding schemes. Turbo codes are the best suited for FEC (Forward Error Correction) in channel coding which also has near Shannon error-correcting performance. But at the same time it is also necessary to ha...

2013

Use of turbo codes is more popular in most of the wireless applications, because of its greater Error control ability. The BER performance reaches to the Shannon’s channel capacity limit. Turbo code implementation using SISO decoders with iterative MAP decoding algorithms introduces large time delay to recover the transmitted information bits. This results in increasing Wi-Max system complexity and storage requirement (M emory size). In this paper, the efforts have been made to propose the methods for effective termination of iterations to make the decoder efficient, in terms of reduction in the time delay and the requirement of memory size while maintaining the BER performance. Authors have propose various termination techniques which help in reducing the complexity as compare to conventional MAP decoding algorithm for same BER performance.

2017

The wireless communication has two significant blocks across transmitter and receivers are encoders and decoders. This work focuses on the design and implementation of turbo decoder in hardware description language (HDL) in verilog version. The turbo codes are very efficient in channel coding and are reaching the Shannon limit. The proposed design for turbo decoder uses the max-log algorithms instead of using max-log-MAP algorithm which computes on approximation. The design reduces the fixed number of iteration and performs the early termination which greatly reduces the power consumption utilized even after the decoding is completed. For early termination, the Sign Difference Ratio (SDR) is considered and across the hardware coding clock gating is introduced to avoid the unnecessary clock supply to achieve the power efficiency. The entire design has been implemented on vertex 4 and vertex 5 of Xilinx FPGAs. The power analysis is made and compared with recent existing technologies.

2016

The LTE standard uses three different modulation schemes to adapt to various channel conditions in order to improve achievable data rates. These modulation schemes are the QPSK, 16-QAM and 64-QAM. This paper presents an overview of a LTE digital communication system Simulink model, designed in order to study the effects of the QPSK, 16-QAM and 64-QAM modulation schemes on the BER performance with an AWGN channel model. Different subsystems within the transmitter and receiver blocks are implemented in Simulink. It is noted that the LTE system uses Turbo channel coding and bit level scrambling to offer reliable and secure services to the users. Depending on the assumed channel condition (clear, medium clear or noisy), the 64QAM, 16-QAM or QPSK modulation scheme, on the transmitter side; as well as the corresponding demodulation scheme, on the receiver side; are automatically selected. Based on the recovered data bits, the obtained bit error rates are analysed, compared and

2014

In this paper, the effect of TPC decoding using Chase-II algorithm with reduced number of test patterns (TPs) is evaluated using the AWGN channel in orthogonal frequency division multiplexing (OFDM) mode. The TPC is constructed with multi-error-correcting extended BoseChaudhuri-Hocquengem (eBCH) codes. TPs are classified into different conditions based on the relationship between syndromes and the number of errors so that TPs with the same codeword are not decoded except the one with the least number of errors. The parameters considered are bit error rate (BER), Eb/N0, data rate and code rate. The research contribution shows that the percent of TPs need to be decoded for eBCH(128, 113, 2) when p = 2 for 1st iteration it is between 22% 16% and from 5th iteration onwards it is between 14% 12% for SNR = 1.5dB, 1.8dB, 2.0dB, 2.2dB, 2.4dB and 2.5dB in 802.16 system, respectively. This research contribution helps to make the 802.16 systems simpler, reduces the decoding time, complexity an...