Literature Survey on Stereo Vision Disparity Map Algorithms

2008

In this paper an effective, hardware oriented stereo correspondence algorithm, able to produce dense disparity maps of improved fidelity is presented. The proposed algorithm combines rapid execution, simple and straight-forward structure as well as comparably high quality of results. These features render it as an ideal candidate for hardware implementation and for real-time applications. The proposed algorithm utilizes the Absolute Differences (AD) as matching cost and aggregates the results inside support windows, assigning Gaussian distributed weights to the support pixels, based on their Euclidean distance. The resulting Disparity Space Image (DSI) is furthered refined by Cellular Automata (CA) acting in all of the three dimensions of the DSI. The algorithm is applied to typical as well as to self-recorded real-life image sets. The disparity maps obtained are presented and quantitatively examined.

Computer Vision, Graphics and Image …, 2006

IJSRD, 2014

This paper presents an analysis to determine disparity map useful for 3D scene reconstruction. Stereo vision systems aim the same by matching two or more images taken from slightly different viewpoints. The main problem that has to be solved is the identification of corresponding pixels, i.e. pixels that represent the same point in the scene. Stereo Matching is not difficult to understand in theory but it is not easy to solve in practice. We describe the quality metrics use for evaluating the performance of stereo correspondence algorithms and the techniques used for acquiring our image data sets and ground truth estimates.

Lecture Notes in …, 2006

2018

It is evident that the accuracy of stereo matching algorithms has continued to increase, based on quantitative evaluations of the resulting disparity maps. Today a number of stereo matching algorithms are available to compute disparity maps. These algorithms are mainly classified as Local and Global algorithms. This paper focuses on designing a system for the estimation of disparity map using a simulation tool with the help of Local stereo matching algorithm. Here the designed system first extract corner feature from input side stereo image pair, then a fundamental matrix is calculated to get an epi polar geometry of a stereo image pair. Using epipoalar geometry, SSD and sub pixel accuracy distance between best similar points is calculated. Finally using this distances Disparity map is estimated. The system gives good disparity results within lesser time.

Microprocessors and Microsystems, 2012

Several applications demand efficient hardware implementations of stereo vision systems in order to furnish real time three-dimensional measurements. This paper proposes a complete fast low-cost stereo vision system that performs stereo image rectification with tangential and radial distortion removal, computes dense disparity maps using the Sum of Absolute Differences as the dissimilarity metric, and, finally, exploits a novel injective consistency check purpose-designed for eliminating unreliable disparity values. The proposed system has been realized and hardware tested for several images resolutions and disparity ranges. When 1280 Â 720 grayscale images are processed with the disparity range equal to 30, the system allows a frame rate up to 97 fps@89 MHz to be reached. It has been realized on a single low-cost XilinxVirtex-4 XC4VLX60 FPGA chip and it occupies 63 DSPs, 128 BRAMs and 15728 slices.

2020

We propose in this paper a real-time dense stereo matching algorithm using variable support window for disparity map computing. Basic real-time local algorithms relying on a fixed and rectangular correlation window suffer from the difficulty for window-based methods lies in determining the best window shape and size for each pixel. This work proposes a novel local approach using a combination of the DSI (Disparity Space Image) structure and gradient information. Two improvements are introduced so that an accurate and fast result will be reached. The first one concerns the proposition of a new strategy in order to optimize the computation time of the initial disparity map. The second one, concerns the pixel similarity measure for matching score computation and it consists to use in addition to the traditional pixel intensities, the magnitude and orientation of the gradients providing more accuracy. Experimental results on real data sets are conducted and a comparative evaluation of the obtained results relatively to the state-of-art methods is presented.

Latin American Applied Research, 2007

This paper describes the design of an algorithm for constructing dense disparity maps using the image streams from two CMOS camera sensors. The proposed algorithm extracts information from the images based on correlation and uses the epipolar constraint. For real-time performance, the processing structure of the algorithm was built targeting implementation on programmable logic, where pipelined structures and condensed logic blocks were used.

Pattern Recognition Letters, 1997

We present a new algorithm for solving the stereo vision matching problem by using dynamic programming. Edge pixels extracted from two images are matched and a dense disparity map is obtained by tilling in the spaces between two consecutive edge pixels. (~) 1997 Elsevier Science B.V.

Proceedings XXV Conference on Design of Circuits and Integrated Systems (DCIS 2010), 2010

Real-time stereo image matching is an important computer vision task. This paper presents the architecture and implementation of an FPGA-based stereo image processor, that produces 25 dense depth maps per second from pairs of 8-bit-per-pixel gray-scale images. The system implements a modification of a previously-reported variable-window-size method to determine the best correspondence for each image pixel. The degree of parallelism of the implementation can be adapted to the available resources: increased parallelism enables the processing of larger images (at the same frame rate). The proposed architecture exploits the memory resources available in modern platform FPGAs. Two prototype implementations have been produced and validated: the smaller one can handle pairs of images of size 208x480 , while the larger one works for images of size 640x480 (both operate at 100 MHz). These results improve on previously-reported ASIC and FPGA-based designs.