The Promise of High-Performance Reconfigurable Computing

IEEE Micro, 2014

2016

Reconfigurable computing is a promising technology to meet future computational demand by leveraging flexibilities and the high degree of parallelism found in reconfigurable hardware fabrics, such as field programmable gate arrays (FPGAs) [1][2]. Reconfigurable computing had played an important role in the course of evolution of the computing paradigms. The journey of FPGAs had carried out from classical Von-Neumann Architecture to Reconfigurable Architecture. The concept of dynamic reconfiguration of the FPGA had been utilized properly with the flexibility of software programming and it has enabled the developers to map the computation intensive functions onto FPGAs. In this paper this journey of Hardware and Software has been described. Programmable hardware with programmable processors is combined in configurable computing systems to capitalize the strengths of hardware and software. This survey paper aims to introduce the research areas of last few years, to present a classifica...

2007 International Conference on Field Programmable Logic and Applications, 2007

Modern FPGAs' parallel computing capability and their ability to be reconfigured make them an ideal platform to build accelerators for supercomputing systems. As a multicore processor, the recently announced Cell Broadband EngineTM1 offers tremendous computing power. In this paper, we introduce a prototype system that combines these two types of computing devices together in a reconfigurable blade and we describe its architecture, memory system and abundant interfaces.

Processor Design, 2007

The capability to tailor the processor instruction set architecture (ISA) around the computational requirements of a given application is proposed today as the most appealing way to match performance with very short time-to-market, accomplishing the reduction of non-recurring engineering (NRE) costs. From Mask-Time Configurable Processors (MTCPs) to Run-Time Reconfigurable Processors (RTRPs), the ISA customization is performed "moving" kernels of initial code from software to hardware, thus introducing a design space exploration problem involving skills in both software and hardware design. Since adaptive processors appear as the natural extension of Digital Signal Processors (DSPs), programming tools for customizable processors need to be as similar as possible to standard software development environments, in order to enable the adaptive computing to the wide audience of DSP programmers. While fast design-space explorations can be performed using high-level description languages, programmers proficient in hardware design can further improve the performance through "structural" descriptions involving, for example, the direct utilization of macro-operators or the possibility of balancing critical paths through register insertion. The widespread knowledge of the ANSI C among developers suggests its usage as main entry language for both configurable and reconfigurable architectures, thus introducing the problem of translating C codes (or C dialects) into some kind of hardware description, be it HDL in case of MTCPs or bit-stream for RTRPs. In this context, Data-Flow Graphs (DFGs) can be efficiently used to close the gap between hardware and software design, thus representing the most natural bridge between the hardware and software descriptions. Furthermore, standard ANSI C can be used by the programmer for the management of the application control flow on the processor core, embedding custom-designed instructions in

2007

This work deals with reconfigurable computation platforms for high speed simulation of physical phenomena, based on numerical models of algebraic linear systems. This type of simulation is of extreme importance in research centers as CENPES/Petrobrs, that develops applications of geophysical processing for prospection of oil and gas. Currently, these applications are implemented on PCs conventional clusters. A new approach for this type of problem is presented here, based on reconfigurable computer systems using Field Programmable Gate Arrays technology (FPGA) and its implications regarding the hardware/software partitioning, operating system, memory connections, communication and device drivers. Such technologies make possible appreciable profits in terms of performance -electric power and processing speed when compared to the conventional clusters. This solution also promotes cost reduction when applied to massive computation and high complexity large data applications, normally used in scientific computation.

2013

— Reconfigurable systems can offer the high spatial parallelism and fine-grained, bit-level resource control traditionally associated with hardware implementations, along with the flexibility and adaptability characteristic of software. While reconfigurable systems create new opportunities for engineering and delivering high-performance programmable systems, the traditional approaches to programming and managing computations used for hardware systems (e.g. Verilog, VHDL) and software systems (e.g. C, Fortran, Java) are inappropriate and inadequate for exploiting reconfigurable platforms. To address this need, we develop a stream-oriented compute model, system architecture, and execution patterns which can capture and exploit the parallelism of spatial computations while simultaneously abstracting software applications from hardware details (e.g., timing, device capacity, microarchitectural implementation details) and consequently allowing applications to scale to exploit newer, larg...

Lecture Notes in Computer Science, 2009

Reconfigurable computing is an emerging paradigm enabled by the growth in size and speed of FPGAs. In this paper we discuss its place in the evolution of computing as a technology as well as the role it can play in the current technology outlook. We discuss the evolution of ROCCC (Riverside Optimizing Compiler for Configurable Computing) in this context.

2011

As the complexity of modern embedded systems increases, it becomes less practical to design monolithic processing platforms. As a result, reconfigurable computing is being adopted widely for more flexible design. Reconfigurable Computers offer the spatial parallelism and fine-grained customizability of application-specific circuits with the postfabrication programmability of software.

Proceedings of the 4th international conference on Hardware/software codesign and system synthesis - CODES+ISSS '06, 2006

... managed system may leverage all commodity Linux software applications for developing, testing, benchmarking, and ... This fully automated tool flow takes the role of a compiler in conventional software ... 8. Block diagram of BORPH system on a BEE2 compute module with OPB ...

Proceedings of the eighth workshop on Parallel and distributed simulation - PADS '94, 1994