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1998, Proceedings Design, Automation and Test in Europe
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2 pages
1 file
This paper presents SHAPES, a tool for hardwaresoftware partitioning. It is based on two main paradigms: the implementation of the partitioning tool by means of an expert system, and the use of fuzzy logic to model the parameters involved in the process.
Applied Intelligence, 1999
Hardware-software co-design addresses the development of complex heterogeneous systems looking for the best tradeoffs among the different solutions. The basic idea is to combine the hardware and software design cycles. This article shows how knowledge-based techniques can be used to solve the hardware-software partitioning problem, the co-design task that makes the decision on the best implementation of the different components of a digital system. In particular, a fuzzy-logic-based expert system, SHAPES, has been developed based on the CommonKADS methodology. This tool takes advantage of two important artificial intelligence bases: the use of an expert's knowledge in the decision-making process and the possibility of dealing with imprecise and usually uncertain values by the definition of fuzzy magnitudes.
Computación Y Sistemas, 2013
Hardware/Software partitioning (HSP) is a key task for embedded system co-design. The main goal of this task is to decide which components of an application are to be executed in a general purpose processor (software) and which ones, on a specific hardware, taking into account a set of restrictions expressed by metrics. In last years, several approaches have been proposed for solving the HSP problem, directed by metaheuristic algorithms. However, due to diversity of models and metrics used, the choice of the best suited algorithm is an open problem yet. This article presents the results of applying a fuzzy approach to the HSP problem. This approach is more flexible than many others due to the fact that it is possible to accept quite good solutions or to reject other ones which do not seem good. In this work we compare six metaheuristic algorithms: Random Search, Tabu Search, Simulated Annealing, Hill Climbing, Genetic Algorithm and Evolutionary Strategy. The presented model is aimed to simultaneously minimize the hardware area and the execution time. The obtained results show that Restart Hill Climbing is the best performing algorithm in most cases.
ACM Transactions on Design Automation of Electronic Systems, 2003
This paper presents an in-depth study of several system partitioning procedures. It is based on the appropriate formulation of a general system model, being therefore independent of either the particular co-design problem or the specific partitioning procedure. The techniques under study are a knowledge-based system and three classical circuit partitioning algorithms (Simulated Annealing, Kernighan&Lin and Hierarchical Clustering). The former has been entirely proposed by the authors in previous works while the later have been properly extended to deal with system level issues. We will show how the way the problem is solved biases the results obtained, regarding both quality and convergence rate. Consequently it is extremely important to choose the most suitable technique for the particular co-design problem that is being confronted.
Formal Methods in System Design, 2004
A crucial point in hardware/software co-design is how to perform the partitioning of a system into hardware and software components. Although several algorithms to partitioning have been recently proposed, the formal verification of the partitioning procedure is an emergent research topic. In this paper we present an innovative and automatic approach to partitioning with emphasis on correctness. The formalism used is occam and the algebraic laws that define its semantics. In the proposed approach, the partitioning procedure is characterised as a program transformation task and the partitioned system is derived from the original description of the system by applying transformation rules, all of them proved from the basic laws of occam. A tool has been developed to allow the partitioning to be carried out automatically. The entire approach is illustrated here through a small case study.
ACM Transactions on Design Automation of Electronic Systems, 2003
This paper presents an in-depth study of several system partitioning procedures. It is based on the appropriate formulation of a general system model, being therefore independent of either the particular co-design problem or the specific partitioning procedure. The techniques under study are a knowledge-based system and three classical circuit partitioning algorithms (Simulated Annealing, Kernighan&Lin and Hierarchical Clustering). The former has been entirely proposed by the authors in previous works while the later have been properly extended to deal with system level issues. We will show how the way the problem is solved biases the results obtained, regarding both quality and convergence rate. Consequently it is extremely important to choose the most suitable technique for the particular co-design problem that is being confronted.
2000
Hardware and software co-design is a design technique which delivers computer systems comprising hardware and software components. A critical phase of co-design process is to decompose a program into hardware and software. This paper proposes an algebraic partitioning method whose correctness is verified in the algebra of programs. We introduce the program analysis phase before program partitioning and develop a collection of syntax-based splitting rules,
One of the key problems in hardware software codesign is hardware software partitioning. This paper describes a new approach to hardware software partitioning using integer programming IP. The advantage of using IP is that optimal results are calculated for a chosen objective function. The partitioning approach w orks fully automatic and supports multi-processor systems, interfacing and hardware sharing. In contrast to other approaches where special estimators are used, we use compilation and synthesis tools for cost estimation. The increased time for calculating values for the cost metrics is compensated by an improved quality of the values. Therefore, fewer iteration steps for partitioningare needed. The paper presents an algorithm using integer programming for solving the hardware software partitioning problem leading to promising results.
Design Automation for Embedded Systems, 1997
One of the key problems in hardware/software codesign is hardware/software partitioning. This paper describes a new approach to hardware/software partitioning using integer programming (IP). The advantage of using IP is that optimal results are calculated for a ...
Design Automation for Embedded Systems, 2011
Embedded systems are widely used in many sophisticated applications. To speed the time-to-market cycle, the hardware and software co-design has become one of the main methodologies in modern embedded systems. The most important challenge in the embedded system design is partitioning; i.e. deciding which modules of the system should be implemented in hardware and which ones in software. Finding an optimal partition is hard because of the large number and different characteristics of the modules that have to be considered.
Arabian Journal for …, 2007
System-level design decisions such as HW/SW partitioning, target architecture selection and scheduler selection are some of the main concerns of current complex system-on-chip (SOC) designs. In this paper, a novel window-based heuristic is proposed that addresses the issue of design space exploration in applications that have a data flow characteristic. The objective in this paper is to partition the application into HW and SW components such that the execution time of the application is minimized while simultaneously satisfying the hard area constraints of the HW units. In this algorithm, the search space is divided into smaller intervals, referred to as windows. For each window the full search is performed to find the optimum partitioning and scheduling solution for that specific window. Moreover, in this paper a novel indexing mechanism is presented for identifying the nodes in the task graph. The proposed index specifies not only the relation of each node with respect to the other nodes in the graph, but also its position in the task graph. With the help of the proposed windowing and indexing techniques, the time required for partitioning is reduced significantly. Simulation results indicate that the proposed algorithm improves the search time by 74% compared to conventional optimization heuristics namely Genetic Algorithm (GA), Simulated Annealing (SA) and Tabu Search (TS), while providing comparable results in terms of the overall execution time of the partitioned system.
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