Academia.edu no longer supports Internet Explorer.
To browse Academia.edu and the wider internet faster and more securely, please take a few seconds to upgrade your browser.
2000, IEEE Journal of Selected Topics in Quantum Electronics
All-optical digital circuits based on loop memories are demonstrated. These circuits are a variable optical buffer, an optical random access memory, an optical shift register, and an optical linear feedback shift register. Buffers are employed in network nodes to solve the contentions without loosing information. Shift registers are used for error detection and correction techniques. Linear feedback shift registers are employed for generation of pseudo-random bit sequences, data scrambling, and encryption/decryption of information in secure communication systems. Since the role of optical processing is gradually increasing within the communication systems, the possibility to store information directly in the optical domain can lead to a systems simplification and to a performance improvement. In order to make the schemes suitable for practical applications, optical integration is necessary. The use of semiconductor optical amplifier as gain element into the memory loop allows all the proposed schemes to be integrated.
Journal of the Optical Society of Korea, 2008
IEEE/OSA Journal of Lightwave Technology, 2009
This paper describes the fiber optic loop buffer-based switch in which contention is resolved in the time and wavelength domain. In the loop buffer, tunable wavelength converters (TWCs) are placed in place of semiconductor optical amplifiers (SOAs) as in conventional loop buffer-based architectures. The placement of TWCs inside the buffer facilitate simultaneous read/write operation and dynamic re-allocation of wavelengths and improves the switch performance significantly. It is a well known fact that the re-circulating type buffer structure suffers from circulation limit (maximum revolutions that data can take in the buffer) due to the loss and noise accumulation in the switch. This paper presents a mathematical model to obtain a maximum number of allowed circulations of the data in loop buffer-based switch architecture. This model is derived for various configurations (transparent, noisy, and regenerative) of TWC. The detrimental effect of crosstalk and four wave mixing are shown, and the affect of dispersion on the maximum allowed bit rate is discussed. The minimum length of the loop is also evaluated. Finally, the bounded region is shown (bit rate versus number of wavelengths graph) where memory can work efficiently.
IEEE Photonics Technology Letters, 2000
The design and experimental characterization of an all-optical circular shift register are presented. The proposed scheme consists of a fiber loop optical buffer and a bit selecting circuit. A semiconductor optical amplifier (SOA) is used as an active element in the buffer structure, while the bit selecting circuit exploits Kerr effect in a highly nonlinear medium. The scheme is designed to store an -bit sequence and to return the bits one by one at a lower clock rate, achieving proper circulating shift register functionality. Photonic integration is possible thanks to the presence of SOA in the buffer loop and to the absence of erbium-doped fiber amplifier-based feedbacks. Moreover, the increase in the number of bits to be stored does not increase the scheme complexity. Experimental validation is demonstrated for = 20 bits, and a signal-to-noise ratio per bit penalty equal to 5.6 dB is achieved at a bit error rate equal to 10 9 with respect to the input sequence.
Applied Optics, 1989
Cascadable optically nonlinear arrays of logic devices interconnected with space invariant optical components are proposed for the core memory of a digital computer. Access time to any portion of the memory is O(log 2 N) gate delays for logic devices with fan-in and fan-out of two, where Nis the size of the memory in bits. The cost of the design in switching components is near minimal for a random access memory (RAM) between one and two components per stored bit of information depending on the size of the memory. The design is extensible to very large RAMs, although parallel access memory is preferred to a RAM configuration for large memories due to the parallel access capability of the optical design.
Advances in Photonics of Quantum Computing, Memory, and Communication IV, 2011
In the perspective of a future all-optical communication network optical shift register will play an important role especially for what concerns several binary functions, such as serial to parallel conversion and cyclic operations, that are involved in techniques allowing error detection and correction as parity check, or cyclic redundancy check. During the last decades, several attempts of realizing circulating memories or shift register in the optical domain were made, with some limits in terms of functionality, number of bit to be stored (under three), scalability or photonic integrability.
Semiconductor Technologies, 2010
Semiconductor Technologies 438 designated output port. The other packet is delayed or discharged. Therefore a complex photonic digital circuit, able to compare two boolean numbers, is mandatory (Andriolli et al., 2007). All-optical subsystems able to discriminate if an N-bit (with N1) pattern representing a boolean number is greater or lower than another one are not reported yet. Calculating the addition of boolean numbers is another important functionality to perform packet header processing. If some packets are routed to the wrong link or are mislabelled, they can be routed in circles without reaching the destination. These loops are a cause of network congestion and must be avoided. A Time-To-Live (TTL) field in the packet prevents the formation of loops. This field represents the maximum number of hops of a packet and it is decremented after each node. When the field value is zero, the packet is discharged (McGeehan et al., 2003). The implementation of this functionality requires an all-optical processing circuit able to perform the decrementing of the boolean number in the TTL field. This operation can be performed by means of an all optical full-adder applying the so called method of complements (Hayes 1998). Moreover the all-optical full-adder can find application in resolving the Viterbi algorithm in the Maximum-Likelihood Sequence Estimation (MLSE) (Forney 1973; Proakis 1996). This method requires performing fast additions. An all-optical implementation of this algorithm can improve its efficiency. Other two important functions are analog-to-digital conversion (ADC) and digital-to-analog conversion (DAC). ADC is a key functionality which, converting continuous-time signals to digital binary signals, enables them to be transmitted through the modern digital communication networks. Applications regard e.g. radar signals, high-definition video, realtime signal monitoring, ultra-fast dispersion compensation. Although it didn't receive the same attention as all-optical analog-to-digital conversion, DAC and/or multilevel codification in the optical domain has also been extensively investigated in order to implement some ultra-fast signal processing functions. These functions include, for instance, pattern recognition for header extraction (Saida et al., 2001), amplitude multiplexing for increasing spectral efficiency (Abbade et al., 2005) or label/payload encoding techniques (Abbade et al., 2006), and waveform generation for radar and display applications (Yacoubian & Das, 2003). The photonic digital processing is effective and attractive if it can be realised with integrated solutions. SOAs have shown to be attractive because of their compactness, stability, low switching energy and low latency. SOAs are reliable, relatively low cost devices which can be integrated within complex optical circuits with hybrid techniques (Maxwell, 2008; Lal et al., 2007; Kehayas et al., 2006 b). In this perspective, the possibility of using a single basic building gate for implementing all the complex logic functions is practical. In this chapter new schemes for the implementation of SOA-based reconfigurable logic gates, a photonic combinatorial network, a comparator, a full-adder, a digital-to-analog converter and an analog-to-digital converter will be presented. 2. Reconfigurable logic gates with a single SOA Scheme of all-optical logic gates are reported in literature, using nonlinear effects in optical fibers (
IEEE Photonics Technology Letters, 2006
In this letter, we demonstrate that all-optical network subsystems, offering intelligence in the optical layer, can be constructed by functional integration of integrated all-optical logic gates and flip-flops. In this context, we show 10-Gb/s all-optical 2-bit label address recognition by interconnecting two optical gates that perform XOR operation on incoming optical labels. We also demonstrate 40-Gb/s all-optical wavelength-switching through an optically controlled wavelength converter, consisting of an integrated flip-flop prototype device driven by an integrated optical gate. The system-level advantages of these all-optical subsystems combined with their realization with compact integrated devices, suggest that they are strong candidates for future packet/label switched optical networks.
Optics Communications, 2010
Photon being the ultimate unit of information with unmatched speed and with data package in a signal of zero mass, the techniques of computing with light may provide a way out of the limitations of computational speed and complexity inherent in electronics computing. Information processing with photon as information carrying signal has shown a high level potentiality through the researches in last few decades. The driving force behind this evolution has been the utilization of interferometric configurations that employ a semiconductor optical amplifier (SOA) as the nonlinear element in combination with cross-phase modulation to achieve switching by means of light. Here, in this paper we present an all-optical circuit of programmable logic device (PLD) with the help of SOA-MZI (Mach–Zehnder interferometer) based optical tree-structured splitter. Numerical simulation result confirming described method is reported here. This paper also explains the applicability of this scheme to perform logical and arithmetic operations in all-optical domain.
IEEE Journal of Selected Topics in Quantum Electronics, 2000
All-optical digital devices are key components for advanced signal processing in next generation optical networks and optical computing. In most digital systems, photonic integrated circuits are required to carry out high-speed energy efficient functionalities. In this paper, an entire set of integrable all-optical clocked flip-flops and an all-optical binary counter are proposed, as applications of SR latches and logic gates previously introduced in literature. The SR latch is based on gain quenching mechanism between two coupled ring lasers using a semiconductor optical amplifier (SOA) as active element. Photonic logic functions are carried out by exploiting four wave mixing (FWM) and cross gain modulation (XGM) nonlinear effects in SOAs. Different flip-flop logical functionalities, including SR-, D-, T-, and JK-types, as well as an all-optical binary counter, are obtained by adding one of the logic gates, or a combination of them, to the latch scheme. The effectiveness of the proposed schemes is demonstrated by extinction ratio and Q-factor measurements. All solutions are tunable in the whole C-band and can work at different counting rate without any reconfiguration. Photonic integration allows to increase the functioning rate beyond gigahertz and reduce the switching energy.
Applied Optics, 2009
A semiconductor optical amplifier-based all-optical read-only memory (ROM) is successfully demonstrated through simulations using a one-level simplification method optimized for optical logic circuits. Design details are presented, and advantages are discussed in comparison with an all-optical ROMemploying decoder. We demonstrate that eight characters can be stored at each address in the American Standard Code for Information Interchange.
IEEE Journal of Selected Topics in Quantum Electronics, 2000
A novel scheme for integrable ultrafast all-optical flipflop is demonstrated. Transition times as low as 20 ps with a contrast ratio higher than 17.5 dB have been experimentally measured. All-optical switching operation in a 2×2 spatial and wavelength preserving switch is reported with a power penalty of about 1 dB. The proposed solution exploits the fast falling edge provided by a semiconductor optical amplifier (SOA) based optical flip-flop. Numerical investigations already demonstrated high extinction ratios (>40 dB) and low switching energies (15.6 fJ) for integrated optical flip-flop. On the other hand, slow rising times, due to the cavity length, intrinsically limit such configurations. By using SOA-based logic gates, two flip-flop outputs are combined in a new bistable signal. Both the new rising and falling edges are related to the primary flip-flop falling edge. This way it is possible to eliminate the intrinsic slow rising time that limits the flip-flop configuration based on the coupled ring lasers, without excessively increasing the complexity of the structure and maintaining a reasonably high contrast ratio. Furthermore, the noise on the high level has been improved due to the regenerative properties of the logic gates based on cross-gain modulation and cross-phase modulation in a single nonlinear SOA. Finally, flip-flop output has been used to drive a 2×2 all-optical spatial and wavelength preserving switch based on SOAs. For cross/bar switch configurations, 10 Gb/s error-free operation has been obtained without bit loss. Index Terms-All-optical flip-flop, cross-gain modulation (XGM), optical bistable devices, optical packet switching (OPS), optical signal processing (OSP), semiconductor optical amplifier (SOA).
Le Journal De Physique Colloques, 1988
The operation of three optical circuits is described. These are: a four-channel flip-flop, a single-gate full-adder and a digital edge extractor. A recently-developed operating surface analysis is used to place requirements on gate response for successful operation and to predict switching times.
Proceedings. ISCC 2004. Ninth International Symposium on Computers And Communications (IEEE Cat. No.04TH8769)
... Amplifier Nema Elfaramawy *, Amira Awad** Electrical Engineering Department, Faculty of Engineering, Alexandria Universi@, Alexandria, EgvPl *Email: n-elfaramawy@yahoo. com ZI Email: happygirllOO2001 @yahoo. com ...
… (ICTON), 2010 12th …, 2010
In this paper we have evaluated the non-linear response of a semiconductor optical amplifier (SOA) in terms of Cross Gain Modulation effect (XGM). The different ranges of optical power that make the SOA work as a logic gate have been determined, as well as the optimum relation between inputs to obtain the best response. Taking into account the SOA response, a schematic model for an all-optical 4-input NOR gate using a single SOA has been proposed. Our experimental set-up has been tested with four streams of 10 Gbps RZ data to verify the proper and stable operation of the NOR gate under diverse power levels for each data input. The logic output has been evaluated for different inputs using an optical eye diagram to verify its quality; in addition, the possibility of using the NOR output as the input to other logical semiconductor structures, which would allow to chain multiple gates, has been demonstrated. The concatenation of NOR gates allows to build more complex all-optical devices which will permit the design of advanced mechanisms in the field of transparent networks, such as comparators or look-up tables for switching nodes, without the necessity of optical-electrical conversion.
Communications - Scientific letters of the University of Zilina, 2004
ICENCO'2010 - 2010 International Computer Engineering Conference: Expanding Information Society Frontiers, 2011
We experimentally demonstrate the accuracy of an all-optical S-R latch and an optical S-R flip-flop based on hybrid integrated Mach-Zehnder Interferometers, with Semiconductor Optical Amplifier in each arm (MZI-SOA). The performance of both bistable devices will be studied and compared in terms of extinction ratio and switching times.
Microwave and Optical Technology Letters, 2020
All optical memory elements are considered to be essential building components for optical networks with high practicality and utility. In this paper, a feasible integrable scheme is presented for the realization of all optical shift register, which is basically a memory device, where the information is transferred from input to output based on the configurations either in serial or parallel upon a clock pulse. Shift registers are classified based on input-output configuration as serial input-serial output, serial inputparallel output, parallel input-serial output (PISO), and parallel input-parallel output. All optical shift register is designed using interconnected D flip-flop (DFF) memories that are driven by standard clock pulses. DFF is built using Mach-Zehnder interferometer-semiconductor optical amplifier based on all optical logic gates, which is then cascaded accordingly to design different types of 4-bit shift registers except for PISO which is designed as a 2-bit shift register. The entire design is simulated in optisystem and verified the data transfer through DFFs in various configurations. The speed of the circuit is the same as data rate. The proposed circuits are simulated up to data rate of 100 Gbps.
Optical Engineering, 2012
Increasing communication traffic and plans to increase various services may cause a serious problem towards the power consumption of network equipment. One of the causes of large power consumption in the present network is the multiplexing scheme, such as wavelength division multiplexing (WDM) and electrical routing of the packet signals. WDM requires O/E (optical to electrical) and E/O (electrical to optical) signal conversion circuits with the same number as that of wavelength, resulting in an increase in power consumption. In addition to this electrical signal processing for the IP packet, routing, and switching at the router consumes a large amount of power. If we could process ultrafast signals using electromagnetic light waves without converting to electrical signals, this would reduce the power consumption of routers. One of the ways to overcome these problems is the development of all-optical computing devices. All-optical computing devices are based on the nonlinear interaction of light waves, which is an electromagnetic wave. The use of electromagnetic light waves makes computing, such as switching, possible at very high frequencies of more than 100 GHz. We discuss all-optical computing devices based on semiconductor optical amplifiers with the main emphasis on all-optical logic gates.
Optics Communications, 2006
All-optical OR operation has been demonstrated using a semiconductor optical amplifier (SOA) and delayed interferometer (DI) at 80 Gb/s. The DI is based on a polarization maintaining loop mirror. Q-factor of the operation is discussed through numerical simulations. The results show the OR gate operation rate is limited by the gain recovery time and input pulse energy.
Optics Communications, 2012
In this paper a novel and simple structure for operation as a high speed optical logic gate based on bulk semiconductor optical amplifier (SOA) is presented. The gain dynamic and phase response of bulk SOA using rate equations including the dynamics of carrier heating (CH) and spectral-hole burning (SHB) numerically is investigated. By using the presented numerical method, operation of NOR gate is analyzed and we show that the NOR gate can operates at 1Tb/s. High speed logic gates based on bulk SOA can be realized by using the proposed structure.
Loading Preview
Sorry, preview is currently unavailable. You can download the paper by clicking the button above.