Heterogeneous Latch-Based Asynchronous Pipelines
Tiberiu Chelcea2008, 2008 14th IEEE International Symposium on Asynchronous Circuits and Systems
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Abstract
We present a technique to automatically synthesize heterogeneous asynchronous pipelines by combining two different latching styles: normally open D-latches for high performance and self-resetting D-latches for low power. The former is fast but results in high power consumption due to data glitches that leak through the latch when it is open. The latter is normally closed and is opened just before data stabilizes. Thus, it is more power-efficient but slower than normally open D-latches.
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