The Fourth Element: Insights into the Memristor

ArXiv, 2017

A memristor is a two-terminal nanodevice that its properties attract a wide community of researchers from various domains such as physics, chemistry, electronics, computer and neuroscience. The simple structure for manufacturing, small scalability, nonvolatility and potential of using in low power platforms are outstanding characteristics of this emerging nanodevice. In this report, we review a brief literature of memristor from mathematic model to the physical realization. We discuss different classes of memristors based on the material used for its manufacturing. The potential applications of memristor are presented and a wide domain of applications are explained and classified.

physica status solidi (c), 2014

2017 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS), 2017

The memristor is an emerging technology which is triggering intense interdisciplinary activity. It has the potential of providing many benefits, such as energy efficiency, density, reconfigurability, nonvolatile memory, novel computational structures and approaches, massive parallelism, etc. These characteristics may lead to deeply revise existing computing and storage paradigms. This paper presents a comprehensive overview of memristor technology and its potential to design a new computational paradigm.

Proceedings of The IEEE, 2012

2017

Current discovery of the memristor has sparked a new wave of enthusiasm and optimism that has resulted in revolutionizing circuit design. Memristive devices are potential elements for nanoelectronics applicable in nonvolatile memory and storage, defect-tolerant circuitry and neuromorphic computing. We present its main applications in the circuit design and computer technology, together with future developments.

Journal of Integrated Circuits and Systems

Memristors are a promising building block to the next generation of computing systems. Since 2008, when the physical implementation of a memristor was first postulated, the scientific community has shown a growing interest in this emerging technology. Thus, many other memristive devices have been studied, exploring a large variety of materials and properties. Furthermore, in order to support the design of practical applications, models in different abstract levels have been developed. In fact, a substantial effort has been devoted to the development of memristive based applications, which includes high-density nonvolatile memories, digital and analog circuits, as well as bio-inspired computing. In this context, this paper presents a survey, in hopes of summarizing the highlights of the literature in the last decade.

The fourth fundamental circuit element-Memristor, was mathematically predicted by Prof. Leon Chua in his seminal research paper in IEEE Transaction on Circuit Theory on the symmetric background. After four decade in 2008, researchers at the Hewlett-Packard (HP) laboratories reported the development of a new basic circuit element that completes the missing link between charge and flux linkage, which was postulated by Chua. The new roadmap in the field of circuit designing, soft computing, memory technology and neuromorphic applications are emerged out very quickly in scientific community due to memristor. However the commercial device level memristor is not realized and reported in the literature until now. This paper overviews the some of the pioneer and state of art development in the view of memristor. The criticism constrains about memristor in scientific fraternity are also discussed.

The 2010 International Joint Conference on Neural Networks (IJCNN), 2010

As semiconductor devices have shrunk further into the nanoscale regime, a new device, the memristor, has been discovered that has the potential to transform neuromorphic computing systems. This device is considered as the fourth fundamental circuit element. It was first theorized by Dr. Leon Chua in 1971 and has been discovered by HP labs in 2008. This paper describes initial efforts at fabricating the memristor devices and examining their properties. Two versions of memristor devices have been fabricated at the University of Dayton and the Air Force Research Laboratory utilizing varying thicknesses of the Ti02 dielectric layers. Our results show that the devices do exhibit the characteristic hysteresis loop in their I-V plots. Further refinement in the devices to achieve stronger hysteresis will be carried out as future work.

In 2008, researchers at the Hewlett–Packard (HP) laboratories published a paper in Nature reporting the development of a new basic circuit element that completes the missing link between charge and flux linkage, which was postulated by Chua in 1971 (Chua 1971 IEEE Trans. Circuit Theory 18, 507–519 (doi:10.1109/TCT.1971.1083337)). The HP memristor is based on a nanometre scale TiO2 thin film, containing a doped region and an undoped region. Further to proposed applications of memristors in artificial biological systems and non-volatile RAM, they also enable reconfigurable nanoelectronics. Moreover, memristors provide new paradigms in application-specific integrated circuits and field programmable gate arrays. A significant reduction in area with an unprecedented memory capacity and device density are the potential advantages of memristors for integrated circuits. This work reviews the memristor and provides mathematical and SPICE models for memristors. Insight into the memristor device is given via recalling the quasi-static expansion of Maxwell’s equations. We also review Chua’s arguments based on electromagnetic theory.

As conventional memory technologies are challenged by their technological physical limits, emerging technologies driven by novel materials are becoming an attractive option for future memory architectures. Among these technologies, Resistive Memories (ReRAM) created new possibilities because of their nanofeatures and unique I–V characteristics. One particular problem that limits the maximum array size is interference from neighboring cells due to sneak-path currents. A possible device level solution to address this issue is to implement a memory array us-ing complementary resistive switches (CRS). Although the storage mechanism for a CRS is fundamentally different from what has been reported for memristors (low and high resistances), a CRS is simply formed by two series bipolar memristors with opposing polarities. In this paper, our intention is to introduce modeling principles that have been previously verified through measurements and extend the simulation principles based on memristors to CRSdevices and, hence, provide an analytical approach to the design of a CRS array. The presented approach creates the necessary design methodology platform that will assist designers in implementation of CRS devices in future systems.