A Historical Perspective on Computer Arithmetic

2009

This Parameterized Digital Electronic Arithmetic (PDEA) model replaces linear operations with non-linear ones. In this paper we introduce a hardware implementation of the parametric image-processing framework that will accurately process images and speed up computation for addition, subtraction, and multiplication. Particularly, the paper presents the design of arithmetic circuits including parallel counters, adders and multipliers based in two high performance threshold logic gate implementations that we have developed. We will also explore new microprocessor architectures to take advantage of arithmetic. The experiments executed have shown that the algorithm provides faster and better enhancements from those described in the literature. Its potential applications include computer graphics, digital signal processing and other multimedia applications.

Theoretical Computer Science, 2002

This paper discusses the relationship between computer arithmetic and hardware implementation. First, we examine the impact of computer arithmetic on the overall performance of today's microprocessors. By comparing their evolution over the last 10 years, we show that the performance of arithmetic operators is far less critical than the performance of the memory hierarchy or the branch predictors. We then discuss the potential for improvement in arithmetic performance, both for pipelined and non-pipelined operations. We then examine the possible impact of new technologies, such as MMX technology or asynchronous control of microprocessors, on computer arithmetic. Finally, we show that programmable logic devices now permit a cost-e ective implementation of speciÿc arithmetic number representations, such as serial arithmetic or logarithmic representations.

2016

Checking the Correctness of Arithmetic Calculations.

2020

An introduction and the state of work of the project for the implementation of high-precision arithmetic in an overlaying numeration system, which provides digit-wise parallelism of operations of addition and subtraction of real numbers with restricted carry propagation only by 1–2 bits, is presented. The historical origins of ideas behind such numeration systems in the history of mathematics, dating back to A.L. Cauchy (1840) and L.E.J. Brouwer (1921), are outlined. We explain a simplest overlaying system referred to as "three halves". It is built on the binary system by adding a extra (redundant) third digit representing an interval overlaying with the intervals of 0 and 1. We demonstrate an addition scheme for it, which propagates a carry to next two positions. A simpler scheme with carry propagation to only one position is also shown, and we argue that it requires two redundant digits and a numeration system base not less than 3.

History of Computing, 2017

The History of Computing series publishes high-quality books which address the history of computing, with an emphasis on the 'externalist' view of this history, more accessible to a wider audience. The series examines content and history from four main quadrants: the history of relevant technologies, the history of the core science, the history of relevant business and economic developments, and the history of computing as it pertains to social history and societal developments Titles can span a variety of product types, including but not exclusively, themed volumes, biographies, 'profile' books (with brief biographies of a number of key people), expansions of workshop proceedings, general readers, scholarly expositions, titles used as ancillary textbooks, revivals and new editions of previous worthy titles These books will appeal, varyingly, to academics and students in computer science, history, mathematics, business and technology studies. Some titles will also directly appeal to professionals and practitioners of different backgrounds.

The Mathematics Enthusiast

This paper discusses the formalization of the binary number system and the groundwork that was laid for the future of digital circuitry, computers, and the field of computer science. The goal of this paper is to show how Gottfried Leibniz formalized the binary number system and solidified his thoughts through an analysis of the Chinese I Ching. In addition, Leibniz's work in logic and with computing machines is presented. This work laid the foundation for Boolean algebra and digital circuitry which was continued by George Boole, Augustus De Morgan, and Claude Shannon in the centuries following. Some have coined Leibniz the world's first computer scientist, and this paper will attempt to demonstrate a validation of this conjecture.

Encyclopedia of Information Science and Technology, Third Edition

IEEE Transactions on Computers, 2000

2007

This paper presents a performance analysis of reversible, fault tolerant VLSI implementations of carry select and hybrid decimal adders suitable for multi-digit BCD addition. The designs enable partial parallel processing of all digits that perform high-speed addition in decimal domain. When the number of digits is more than 25 the hybrid decimal adder can operate 5 times faster than conventional decimal adder using classical logic gates. The speed up factor of hybrid adder increases above 10 when the number of decimal digits is more than 25 for reversible logic implementation. Such highspeed decimal adders find applications in real time processors and internet-based applications. The implementations use only reversible conservative Fredkin gates, which make it suitable for VLSI circuits.

Springer eBooks, 2018

C HAPTER has shown that operations on floating-point numbers are naturally expressed in terms of integer or fixed-point operations on the significand and the exponent. For instance, to obtain the product of two floating-point numbers, one basically multiplies the significands and adds the exponents. However, obtaining the correct rounding of the result may require considerable design effort and the use of nonarithmetic primitives such as leading-zero counters and shifters. This chapter details the implementation of these algorithms in hardware, using digital logic. Describing in full detail all the possible hardware implementations of the needed integer arithmetic primitives is much beyond the scope of this book. The interested reader will find this information in the textbooks on the subject [345, 483, 187]. After an introduction to the context of hardware floating-point implementation in Section 8.1, we just review these primitives in Section 8.2, discuss their cost in terms of area and delay, and then focus on wiring them together in the rest of the chapter. We assume in this chapter that inputs and outputs are encoded according to the IEEE 754-2008 Standard for Floating-Point Arithmetic.

Decimal number system is purportedly the most used number system by humans. However, there are diverse ways of counting numbers, when it comes to computer systems, the number system that crosses our mind is the binary number system. When represented, binary number system takes a considerable number of bits in comparison to ternary number system i.e trits. In this paper we propose an algorithm based on ternary number system which enables us to multiply two ternary numbers, which will be more efficient in a ternary system only.

IEEE Transactions on Education, 2003

This paper presents an initiative to teach computer representation of numbers and arithmetic in undergraduate courses in computer science and engineering. The approach is based upon carefully designed practical exercises that highlight the main properties and computational issues of finite-length number representation and arithmetic. In conjunction with the exercises, an auxiliary computer-based environment constitutes a valuable support tool for students to learn and understand the concepts involved. For integer representation, this work has focused on the standard 2's complement. Special emphasis has been put on the algorithms for integer arithmetic operations. For floating-point representation, simpler formats have been used as an introduction to the IEEE Standard 754, with the aim of presenting the fundamentals of the floating-point computation and emphasizing its limitations. This approach could be included in introductory courses related to computer organization, programming, discrete mathematics, or numerical methods.