Implementation of Turbo Encoder and Decoder

2015

Consultative Committee for Space Data System (CCSDS) recommended a common standard for space telemetry channel coding systems. Turbo codes represent a major paradigm shift in the approach to coding systems for deep space communications. For decoding purpose, memory optimized iterative Max-log-MAP algorithm is used which is less complex and having less memory requirements. In this paper, the performance of turbo codes namely Bit Error Rate (BER) is analyzed for different block lengths and code rates. The complete analysis is done for AWGN channel, since AWGN channel is to be assumed for deep space applications. Simulations of turbo encoder and decoder are done using C and MATLAB.

Communications on Applied Electronics, 2015

To deal with n numbers of user simultaneously and error free communication with maximum utilization of limited spectrum, BER(bit error rate) improvement is an open challenge for communication engineers. In this paper work is an attempt to implement such an error control code Turbo code in which BER improve by using various efficient encoding and decoding designs. Turbo code provides modest decoding complexity for large block length and better bit error rate as compared to other code. According to [7] RSC encoder provides minimum error probability is implemented. For testing AWGN wireless channel is used. Recursive structure along with BPSK modulation is used. The decoding algorithm such as Viterbi algoritm,MAP(maximum a posterior),BCJR (bahl, cocke, jelinek and raviv)can be used .

The field of forward error correction was greatly influenced by the discovery of turbo codes. This invention led to a great improvement in terms of Bit-Error-Rate (BER). Various schemes have been proposed and are based either on parallel or serial designs of concatenated decoders. These decoders are iterative using SOVA (soft output viterbi) or MAP (maximum a posteriori) algorithms. They introduce superior recovery functions of data which have been transmitted through noisy environments. Actually, these turbo schemes compared to convolutional codes achieve better data recovery with the increase of the constraint length. Considering all previous principles, we designed a new parallel turbo encoder-decoder system. This system was compared to already existing serial and parallel turbo coding schemes and to a convolutional encoder. Performance level was verified through simulations including Additive White Guassian noise. BER analysis exhibited better results compared to all other designs for various numbers of iterations.

In order to have reliable communication, channel coding is often employed. Turbo code as a powerful coding technique has been widely studied and used in communication systems. Turbo coding is an advanced forward error c o r r e c t i o n a l g o r i t h m . U l t i m a t e Performance that approaches the Shannon limit requires a new approach using iteratively run soft in/soft out (SISO) decoders called turbo decoders. However, the implementation of various Turbo Decoders suffers from a large delay and high power consumption. For this reason, they are not suitable for many applications like mobile communication systems. In this paper, a comparative study has been made and various decoding algorithm used in SISO Turbo Decoders have been analyzed viz. MAP, Log-MAP, Max-Log-MAP and SOVA, to overcome this drawback. This paper examines the principles of turbo coding and decoding algorithms and compare their BER performance.

International Journal of Reconfigurable and Embedded Systems (IJRES), 2023

Turbo codes are error-correcting codes with performance that is close to the Shannon theoretical limit (SHA). The motivation for using turbo codes is that the codes are an appealing mix of a random appearance on the channel and a physically realizable decoding structure. The communication systems have the problem of latency, fast switching, and reliable data transfer. The objective of the research paper is to design and turbo encoder and decoder hardware chip and analyze its performance. Two convolutional codes are concatenated concurrently and detached by an interleaver or permuter in the turbo encoder. The expected data from the channel is interpreted iteratively using the two related decoders. The soft (probabilistic) data about an individual bit of the decoded structure is passed in each cycle from one elementary decoder to the next, and this information is updated regularly. The performance of the chip is also verified using the maximum a posteriori (MAP) method in the decoder chip. The performance of field-programmable gate array (FPGA) hardware is evaluated using hardware and timing parameters extracted from Xilinx ISE 14.7. The parallel concatenation offers a better global rate for the same component code performance, and reduced delay, low hardware complexity, and higher frequency support.

This paper describes the novel concept of turbo coding and decoding. Basic statistical measures such as an Exclusive OR (XOR) and likelihood were reviewed, and these measures were used to describe the error performance of a decoder using two iterations. We studied the turbo codes working mechanism and how performance is improved when decoders are used in an iterative decoding process using XOR gates. The above technique is been implemented theoretically, first turbo encoder within which RSC encoders working is explained, resultant output is arranged in a sequence. Second turbo decoder using XOR gate is studied and results of second iteration is compared with input sequence and verified

2002

International Journal of Computer Applications, 2017

This paper presents design and implementation of turbo code, after that many types of decoders are introduced with various many parameters such as(number of iteration, length of code, number of frame, type of decoding techniques, rate, generator polynomial and type of channel) get the Bit Error Rate (BER) for each case, and compare the results. This work in order to study the effect of each parameter on the performance of Turbo Code to specify the parameters that give the optimum performance of this codes. Finally turbo encoder implemented on FPGA device.

Elsevier eBooks, 2014

This chapter is a general introduction to the original turbo codes discovered in the early 1990s and also known as convolutional turbo codes or parallel concatenated convolutional codes. It presents the main concepts of coding theory introduced with the invention of turbo codes, put in an historical perspective. The overall structures of the encoder and decoder are analyzed and some fundamental guidelines for the design of turbo codes with good performance are provided. Then, the basics of turbo decoding are introduced and the main component decoding algorithms are briefly described. Finally, the very first proof-of-concept implementations are described and the pioneer telecommunication applications and current transmission standards using turbo codes are reviewed.