GaAs Solar Cells on Nanopatterned Si Substrates

Ieee Trans Electron Devices, 2005

High-performance p + n GaAs solar cells were grown and processed on compositionally graded Ge-Si 1 Ge-Si (SiGe) substrates. Total area efficiencies of 18.1% under the AM1.5-G spectrum were measured for 0.0444 cm 2 solar cells. This high efficiency is attributed to the very high open-circuit voltages (980 mV (AM0) and 973 mV (AM1.5-G)) that were achieved by the reduction in threading dislocation density enabled by the SiGe buffers, and thus reduced carrier recombination losses. This is the highest independently confirmed efficiency and open-circuit voltage for a GaAs solar cell grown on a Si-based substrate to date. Larger area solar cells were also studied in order to examine the impact of device area on GaAs-on-SiGe solar cell performance; we found that an increase in device area from 0.36 to 4.0 cm 2 did not degrade the measured performance characteristics for cells processed on identical substrates. Moreover, the device performance uniformity for large area heteroepitaxial cells is consistent with that of homoepitaxial cells; thus, device growth and processing on SiGe substrates did not introduce added performance variations. These results demonstrate that using SiGe interlayers to produce "virtual" Ge substrates may provide a robust method for scaleable integration of high performance III-V photovoltaics devices with large area Si wafers.

IEEE Transactions on Electron Devices, 2005

High-performance p + n GaAs solar cells were grown and processed on compositionally graded Ge-Si 1 Ge-Si (SiGe) substrates. Total area efficiencies of 18.1% under the AM1.5-G spectrum were measured for 0.0444 cm 2 solar cells. This high efficiency is attributed to the very high open-circuit voltages (980 mV (AM0) and 973 mV (AM1.5-G)) that were achieved by the reduction in threading dislocation density enabled by the SiGe buffers, and thus reduced carrier recombination losses. This is the highest independently confirmed efficiency and open-circuit voltage for a GaAs solar cell grown on a Si-based substrate to date. Larger area solar cells were also studied in order to examine the impact of device area on GaAs-on-SiGe solar cell performance; we found that an increase in device area from 0.36 to 4.0 cm 2 did not degrade the measured performance characteristics for cells processed on identical substrates. Moreover, the device performance uniformity for large area heteroepitaxial cells is consistent with that of homoepitaxial cells; thus, device growth and processing on SiGe substrates did not introduce added performance variations. These results demonstrate that using SiGe interlayers to produce "virtual" Ge substrates may provide a robust method for scaleable integration of high performance III-V photovoltaics devices with large area Si wafers.

2019

The monolithic integration on silicon of GaAs, and more generally of III-V semiconductors, is a very attractive and promising route for the production of high efficiencies multijunctions devices in the manner of those developed for space applications on germanium, but at a much lower cost suitable for terrestrial PV applications. The purpose of this paper is to present the building blocks we have developed for defect-free growth of GaAs on silicon for tandem solar cell applications. This will be addressed from the technological point of view as well as from design, modelling and characterization perspectives. Preliminary work has allowed the identification of critical technological bottlenecks, following which solution routes have been developed as will be presented and discussed. The resulting design for a GaAs/Si tandem solar cell will then be described..

Applied Physics Letters, 1988

Vacuum, 1990

In this paper we present the results of a study of the approaches we have adopted to limit defect propagation in GaAs on silicon. These include use of SLS, thermal annealing, and restricted area growth. We have demonstrated that bands of GalnAslGaAs Strained Layer Superlattice (SLS), or single ternary layers can be used to intercept and bend over dislocations. However, although this approach can lead to significant reductions in defect density 10m9 to Tom7 cm-', the effect is limited due to interactions between dislocations that have been successfully diverted and the consequent reduction of the strain field at the SLSlmatrix interface. Dislocation density reductions from IO-8 to 10e6 cme2 were observed for restricted area deposition of GaAs on profiled silicon substrates. The objective here was to provide 'sinks' to pin dislocations at exposed areas or at specific crystal facets defined by the substrate geometry. Sequential thermalanneallgrow routines were also investigated both separately, and in conjunction with other defect limiting techniques such as the use of the strained layer superlattices and gro wth on profiled substrates. These structures were assessed by X-ray diffraction, plan view, and cross-sectional TEM. Where appropriate, experimental GaAslSi device structures were also fabricated and tested.

IEEE Transactions on Electron Devices, 2005

High-performance p + n GaAs solar cells were grown and processed on compositionally graded Ge-Si 1 Ge-Si (SiGe) substrates. Total area efficiencies of 18.1% under the AM1.5-G spectrum were measured for 0.0444 cm 2 solar cells. This high efficiency is attributed to the very high open-circuit voltages (980 mV (AM0) and 973 mV (AM1.5-G)) that were achieved by the reduction in threading dislocation density enabled by the SiGe buffers, and thus reduced carrier recombination losses. This is the highest independently confirmed efficiency and open-circuit voltage for a GaAs solar cell grown on a Si-based substrate to date. Larger area solar cells were also studied in order to examine the impact of device area on GaAs-on-SiGe solar cell performance; we found that an increase in device area from 0.36 to 4.0 cm 2 did not degrade the measured performance characteristics for cells processed on identical substrates. Moreover, the device performance uniformity for large area heteroepitaxial cells is consistent with that of homoepitaxial cells; thus, device growth and processing on SiGe substrates did not introduce added performance variations. These results demonstrate that using SiGe interlayers to produce "virtual" Ge substrates may provide a robust method for scaleable integration of high performance III-V photovoltaics devices with large area Si wafers.

physica status solidi (RRL) - Rapid Research Letters, 2016

Conference Record of the Twenty-Ninth IEEE Photovoltaic Specialists Conference, 2002., 2002

Single junction GaAs solar cells having an n/p polarity were grown on p-type Ge/SiGe/Si substrates for the first time. The cell performance and material properties of these n/p cells were compared with p/n cells grown on ntype Ge/SiGe/Si substrates for which record high minority carrier hole lifetimes of 10 ns and open circuit voltages (V oc) greater than 980 mV (AM0) were achieved[1,2]. The initial n/p experimental results and correlations with theoretical predictions have indicated that for comparable threading dislocation densities (TDD), n/p cells have longer minority carrier diffusion lengths, but reduced minority carrier lifetimes for electrons in the p-type GaAs base layers. This suggests that a lower TDD tolerance exists for n/p cells compared to p/n cells, which has implications for the optimization of n/p high efficiency cell designs using alternative substrates.

physica status solidi (a), 2020

Direct heteroepitaxy and selective area growth (SAG) of GaP and GaAs on Si(100) and Si(111) are implemented by low-pressure hydride vapor phase epitaxy (LP-HVPE), which are facilitated by buffer layers grown at 410-490 C with reactive gas mixing directly above Si substrates. High-density islands observed on GaP buffer layers on Si result in rough morphology and defect formation in the subsequent GaP layers grown at 715 C. The impact of growth temperature of GaAs buffer layers on the crystal quality of GaAs/Si is studied. A decreased nucleation temperature significantly improves the morphology and crystalline quality of the overall GaAs growth on Si. It is observed that Si(111) substrates are favorable for both GaP and GaAs growths in comparison with Si(100). In SAGs of GaP/Si and GaAs/Si, the high selectivity innate to HVPE is maintained in the used unconventional growth regime. The spatially resolved photoluminescence mapping reveals the material quality of GaAs/Si is enhanced by defect filtering by SAG. The outcomes of this work will pave the way of III-V/Si integration realized by cost-effective HVPE for photonic device applications.

2010