Dual Antenna Receivers for High Data Rate Terminals

International Journal of Microwave and Wireless Technologies, 2010

In this paper, we address the architecture of multistandard simultaneous reception receivers and we aim to reduce the complexity and the power consumption of the analog front-end. To this end, we propose an architecture using the double orthogonal translation technique in order to multiplex two signals received on different frequency bands. A study case concerning the simultaneous reception of 802.11 g and Universal Mobile Telecommunications System (UMTS) signals is developed in this article. Theoretical and simulation results show that this type of multiplexing does not significantly influence the evolution of the signal-to-noise ratio of the signals. In the same time a 30% reduction of the power consumption is expected as well as a significant reduction of the complexity.

MIMO (Multiple Input Multiple Output) uses multiple antennas at the transmitter and receiver side and exploits the fading that takes place in the channel. The fundamental purpose is catering the needs of growing user interest in application that require more bandwidth. For this MIMO technique is an essential technique in various digital wireless communication systems that guarantee high data rate. Here, in this work, we have investigated two equalization techniques i.e. Zero-Forcing Equalization and Linear Minimum Mean Square Error (LMMSE) estimation.

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

Channels linking information sources and receivers are one of the fundamental blocks of all communication system. The size of the dust particle present in space, those of snows and rain drops are known to affect communication due to their diffracting and scattering effects. A concurrent dual band radio receiver architecture that can operate at both 900MHz and 1800MHz is proposed. The architecture is found to be feasible with additional advantages of low power consumption, light and small chip area. This result implies that, the problem of channel condition can be reduced if this architecture is adopted at both transmission and receptions points.

In this paper, we address the architecture of multistandard simultaneous reception receivers and we aim at improving both the complexity and the power consumption of the analog front-end. To this end we propose an architecture using the double orthogonal translation technique in order to multiplex two received signals. A study case concerning the simultaneous reception of 802.11g and UMTS signals is developed in this article.

IEEE Journal on Selected Areas in Communications, 2000

Enhanced Data Rates for Global Evolution (EDGE) is currently being standardized as an evolution of GSM in Europe and of IS-136 in the United States as an air interface for high speed data services for third generation mobile systems. In this paper, we study space-time processing for EDGE to provide interference suppression. We consider the use of two receive antennas and propose a joint equalization and diversity receiver. This receiver uses feedforward filters on each diversity branch to perform minimum mean-square error cochannel interference suppression, while leaving the intersymbol interference to be mitigated by the subsequent equalizer. The equalizer is a delayed decision feedback sequence estimator, consisting of a reduced-state Viterbi processor and a feedback filter. The equalizer provides soft output to the channel decoder after deinterleaving. We describe a novel weight generation algorithm and present simulation results on the link performance of EDGE with interference suppression. These results show a significant improvement in the signal-to-interference ratio (SIR) performance due to both diversity (against fading) and interference suppression. At a 10% block error rate, the proposed receiver provides a 20 dB improvement in SIR for both the typical urban and hilly terrain profiles.

Globecom '01: Ieee Global Telecommunications Conference, Vols 1-6, 2001

In the forward link of WCDMA systems, multipath propagation destroys the orthogonality of the user signals and causes multi-user interference (MUI). Channel equalization can restore the orthogonality and suppress the MUI. However, adaptive implementations of the chip equalizer receiver that can track fast fading multipath channels are hard to realize in practice. On one hand, sending a training chip sequence at regular time instants in correspondence with the coherence time of the channel would reduce the system's spectral efficiency significantly. On the other hand, using blind techniques that do not require any training overhead would reduce the system's performance. In this paper, we propose new trainingbased and semi-blind space-time chip equalizer receivers for WCDMA systems employing long spreading codes and a continous code-multiplexed pilot. The proposed receivers exploit the presence of a continuous code-multiplexed pilot signal in forthcoming 3G systems and offer both a good performance and a high spectral efficiency. Moreover, they can track multiple base-station signals, whenever the mobile user terminal enters soft handover mode. Whereas the trainingbased receiver only assumes knowledge of the pilot symbols and the pilot code for each base-station, the semi-blind receiver additionally assumes knowledge of all user codes for each base-station. For both receivers, we derive a Least Squares algorithm for block processing and a QRD-based Recursive Least Squares algorithm for adaptive processing.

Advanced Techniques

In this chapter, the main aspects of the design of baseband hardware modules are addressed. Special attention is given to word-length optimization, implementation, and validation tasks. As a case study, the design of an equalizer for a 4G MIMO receiver is addressed. The equalizer is part of a communication system able to handle up to 32 users and provide transmission bit-rates up to 125 Mbps. The wordlength optimization process will be explained first, as well as techniques to reduce computation times. Then, the case study will be presented and analyzed, and the different tasks and tools required for its implementation will be explained. FPGAs are selected as the target implementation technology due to their interest from the DSP community.

IEEE Transactions on Consumer Electronics, 2002

An adaptive multi-target space-time downlink receiver for user terminals of WCDMA systems under soft handoff is presented. The receiver consists of M antennas and K array processors, each one followed by a chip-rate equalizer and a despreader. The resulting K signals are combined in an "adaptive ratio combiner" which is updated by pilot common channel information in UTRA-FDD systems. All the structure in the FDD WCDMA downlink signal is exploited for improved performance. Simulation results for a stationary channel and for COST-259 channel models, for vehicle speed of 50 km/h, are presented.

2002

This paper presents an adaptive multi-target spacetime architecture for downlink receivers in the user terminal of WCDMA systems under soft handoff. The receiver consists of M antennas and K array processors, each one followed by a chip-rate equalizer and a despreader. The resulting signals from these K branches are combined in an adaptive ratio combiner which is updated by the common channel information in UTRA FDD systems. When a large number of antennas is used each array processor is able to collect a given target ray and filter out all the others. On the other hand, when only a small number of antennas is used, due to cost or physical limitation, the chip-rate equalizers try to eliminate the residual interchip interference that strongly affects receiver performance. In both cases an efficient coherent receiver is obtained that exploits the space and time diversity in the incoming signal at the user terminal. All the signal structure of the FDD WCDMA downlink signal is exploited for improved performance. Simulation results using COST-259 channel models for vehicle speed of 50 km/h are compared with results obtained for a difficult hypothetical fixed channel condition.