Papers by Arshin Rezazadeh
Procedia Computer Science
2018 UKSim-AMSS 20th International Conference on Computer Modelling and Simulation (UKSim), 2018
Vehicular ad hoc networks (VANETs) are a subset of mobile ad hoc networks (MANETs). These network... more Vehicular ad hoc networks (VANETs) are a subset of mobile ad hoc networks (MANETs). These networks do not have a specific structure, in which network-forming nodes are moving vehicles. Therefore, routing is essential for data dissemination in these networks. The problem of the link failure between vehicles is one of the principal challenges in these networks. In this paper, a reliable two-layer clusterbased algorithm has been introduced in VANETs to mitigate the link failure problem. Using two-layer routing makes route maintaining and the possibility of self-organization easier when topology does not have a steady shape. At the first level of new method, selecting the strong link and at the second level, the greedy algorithm is used in order to select the best route. Velocity, direction, ST and location are all effective parameters involved in this new algorithm. The proposed protocol that was simulated by NS-2.35 improves the network parameters such as end-to-end delay and packet delivery ratio compared with two similar measured protocols. Increased packet delivery ratio and decreased end to end delay compared with previous protocols showed better performance of the new method.
International Journal of Simulation: Systems, Science & Technology, 2016
Network-on-Chips (NoCs) usually use regular mesh-based topologies. Regular mesh topologies are no... more Network-on-Chips (NoCs) usually use regular mesh-based topologies. Regular mesh topologies are not always efficient because of power and area constraints which should be considered in designing system-on-chips. To overcome this problem, irregular mesh NoCs are used for which the design of routing algorithms is an important issue. This paper introduces a routing algorithm for irregular mesh-based NoCs called IIR for Mesh Networks. In contrast to other routing algorithms, this algorithm can be implemented on any arbitrary irregular mesh NoC and can tolerate solid irregular areas without using virtual channels. Moreover, the proposed algorithm can tolerate non-overlapping faulty regions. Furthermore , the proposed scheme misroutes messages both clockwise and counter clockwise directions to reduce channel contention on an oversized node (ON). The main idea of this algorithm borrowed from odd-even turn model and FT-Cube algorithm. Additionally, proposed algorithm is deadlock-free and livelock-free in meshes for non-overlapping multiple irregular areas and faulty regions in NoC interconnection network. IIR algorithm increases the throughput of physical links more than FTR with lower average message delay. As the simulation results show, IIR has a higher performance compared to FTR algorithm. The results also show that our algorithm has better performance with 100% traffic load in Network-on-Chip.
Networks - Emerging Topics in Computer Science is suitable for advanced undergraduate students an... more Networks - Emerging Topics in Computer Science is suitable for advanced undergraduate students and postgraduate students who are searching for research topics related to networks or requiring some brainstormings against network applications. It discusses various aspects related to networks, from larget-scale/geo-scale networks to micro-scale networks such as network-on-chip (NoC). The contents of this book is designed in the way such that it tries to make a good balance among different major topics in networks (e.g., network models, network theories, network infrastructures and network applications), so that it suits people from different backgorunds, especially those who are strong in one area but are not familiar with other areas. This book is an invaluable companion for students from their first encounter with the subject to more advanced studies, while the high quality artworks are designed to present the key concepts with simplicity, clarity and consistency. There are totally 1...
Embedded Systems and Applications, 2009
A well-known wormhole-switched routing algorithm for 2-D mesh interconnection network, f-cube3, u... more A well-known wormhole-switched routing algorithm for 2-D mesh interconnection network, f-cube3, uses three virtual channels to pass faulty, while only one virtual channel is used when a message didn’t encounter by fault. One of the key issues in the design of NoCs is the development of an efficient communication system to provide high performance interconnection network. We have evaluated a fault-tolerant routing algorithm based on f-cube3 as a solution for increasing the performance of the network in comparison with f-cube3 with better moved messages and lower message delay. We have showed the improvement in the use of virtual channels without adding new extra virtual channel. Simulation of both f-cube3 and our algorithm for the same conditions presented. The results also show that our algorithm has better average of moved messages per faults in the network and better performance at high traffic load.
Communications in Computer and Information Science, 2011
Modifying irregular routing algorithms which are based on fault-tolerant algorithms, they can be ... more Modifying irregular routing algorithms which are based on fault-tolerant algorithms, they can be utilized by irregular networks. These algorithms in general use several virtual channels to pass faults. In this paper, a new wormhole-switched routing algorithm for irregular 2-dimensional (2-D) mesh interconnection Network-on-Chip is evaluated, where not only no virtual channel is used for routing but also no virtual channel is used to pass oversized nodes (ONs). We also improve message passing parameters of ONs as well as comparing ...
Distributed Computing and Networking, 2010
Irregular routing algorithms are based on fault-tolerant algorithms. They are capable of use with... more Irregular routing algorithms are based on fault-tolerant algorithms. They are capable of use with some modifications for irregular networks, and conventionally use several virtual channels (VCs) to pass faults and irregular nodes. A well-known wormhole-switched routing algorithm named f-cube3 employs three virtual channels to overtake faulty blocks. We have estimated an irregular routing algorithm derived from f-cube3 as a solution to increase the utilization of links with a higher saturation point which uses fewer numbers of VCs in comparison to f-cube3 by reducing desired virtual channels to two supporting irregular network. Moreover, simulation of both algorithms, for the same setting has been presented. Over and above, as the simulation results show, our algorithm has a higher performance in comparison with f-cube3 even with one less VC. As well, the results show that our algorithm has less blocked messages in the network with higher switched and routed messages in Network-on-Chip (NoC).
2011 UKSim 5th European Symposium on Computer Modeling and Simulation, 2011
Abstract Altering irregular routing algorithms which are based on fault-tolerant schemas, they ca... more Abstract Altering irregular routing algorithms which are based on fault-tolerant schemas, they can be exploited by irregular networks. These algorithms in general use several virtual channels to pass faults. In this paper, a new wormhole-switched routing algorithm for irregular 2-dimensional (2-D) mesh interconnection Network-on-Chip (NoC) is evaluated, where not only no virtual channel is used for routing but also no virtual channel is used to pass oversized nodes (ONs). We also show improvement of message passing parameters ...
Communications in Computer and Information Science, 2009
Fault-tolerant routing is the ability to survive beyond the failure of individual components and ... more Fault-tolerant routing is the ability to survive beyond the failure of individual components and usually uses several virtual channels (VCs) to pass faulty nodes or links. A well-known wormhole-switched routing algorithm for 2-D mesh interconnection network, f-cube3, uses three virtual channels to pass faulty blocks such as f-ring and f-chain, while only one virtual channel is used when a message does not encounter any fault. One of the key issues in the design of NoCs is the development of an efficient communication system to provide high throughput and low latency interconnection networks. We have evaluated a new fault-tolerant routing algorithm based on f-cube3 as a solution to increase the throughput of physical links more than f-cube3 with lower message delay which uses less number of VCs compared to f-cube3 by reducing required virtual channels to two. Simulation of both f-cube3 and improved algorithm, if-cube2 (improved f-cube2) for the same conditions presented. As the simulation results show, if-cube2 has a higher performance than f-cube3 algorithm even with one less VC. The results also show that our algorithm has less exist packets in network and better performance with 100% traffic load in Network-on-Chip.
2009 International Conference on Embedded Software and Systems, 2009
Fault-tolerant routing is the ability to survive failure of individual components and usually use... more Fault-tolerant routing is the ability to survive failure of individual components and usually uses several virtual channels (VCs) to overcome faulty nodes or links. A wellknown wormhole-switched routing algorithm for 2-D mesh interconnection network called f-cube3 uses three virtual channels to pass faulty regions, while only one virtual channel is used when a message does not encounter any fault. One of the integral stages of designing Network-on-Chips (NoCs) is the development of an efficient communication system in order to provide low latency networks. We have proposed a new fault-tolerant routing algorithm based on f-cube3 as a solution to reduce the delay of network packets which uses less number of VCs in comparison with f-cube3. Moreover, in this method we have improved the use of VCs per each physical link by reducing required channels to two. Furthermore, simulations of both f-cube3 and our algorithm based on same conditions have been presented.
2010 Fourth UKSim European Symposium on Computer Modeling and Simulation, 2010
Abstract Irregular routing algorithms, as modified if fault tolerant algorithms, can be utilized ... more Abstract Irregular routing algorithms, as modified if fault tolerant algorithms, can be utilized by irregular networks. These algorithms conventionally use several virtual channels (VCs) to pass faults and oversized nodes. In this paper, a new wormhole-switched routing algorithm for irregular 2-D mesh interconnection Network-on-Chip is proposed, where no VC is used for routing. We also improve message passing parameters of oversized nodes as well as comparing simulation results of our algorithm and several state of art algorithms. ...
2009 IEEE International Advance Computing Conference, 2009
Fault tolerant routing algorithms, are a key concern in large chips with very complex functionali... more Fault tolerant routing algorithms, are a key concern in large chips with very complex functionality [14]. Each IP-Core on-chip communication. This paper examines fault tolerant is an independent component which can meet noncommunication algorithms for use in Network-on-Chip (NoC). deterministic operation models. By this idea, each component We propose an improved wormhole-switched routing algorithm has two segments to operate in communication and in 2-dimentional mesh based on f-cube3 [22] algorithm to computation modes separately. Those IPs can be CPU or DSP decrease message latency. The existing key concept is using cores, video stream processors, and high-bandwidth I/O [11]. numbers of virtual channels (VC) via a physical link. This paper On-chip interconnection, which connects intellectual property proposes some improvements to make use of VCs while the (IP) cores, is one of the most crucial components in Systemsnumbers of them are fixed. We show that when a message is not. .. blocked by fault, all VCs could be used; f-cube3, however, uses cona-Cip (o , in terms of om , rel t, po only one of the VCs. Furthermore, the strength of the improved t algorithm is demonstrated by comparing results of simulations in The desired future SoC methodology should enable, not both f-cube3 and the improved algorithm if-cube3. only, reuse of traditional IP-cores but also communication infrastructure [23]. According to ITRS 2007, a single chip Keywords: Network-on-Chip wormhole switching mesh delay would be included huge number of components using 25nm fault-tolerant routing, interconnection technology in 2015 [20]. Current day bus based shared medium architectures will not be suitable as they would have to be I. INTRODUCTION implemented as hierarchical structures extending to multiple Much of the progress in SoC designs relies on using levels. The bus-based organization remains convenient for appropriate design and process technologies, as well as on the current SoCs that integrate fewer than five processors and, ability to interconnect existing components. The major rarely, more than 10 bus masters. In these architectures, every challenge designers of these systems must overcome will be to data transfer is broadcast, meaning the data must reach each provide for functionally correct, reliable operation of the possible receiver at great energy cost. Future integrated interacting components. On-chip physical interconnections will systems will contain tens to hundreds of units generating present a limiting factor for performance and energy information that must be transferred. For such systems, a consumption. Since global control of information traffic busbased network would become a critical performance and between components is very difficult and needs to keep track power bottleneck [3]. of each component's states, components will initiate data An idea for SoC architecture, proposes borrowing models transfers autonomously-according to their needs [3]. and techniques from the network design field and applying As SoC complexity scales, capturing the system's them to SoC design. From this point of view, a SoC is functionality with fully deterministic operation models will considered as a micronetwork of components [3]. The various become increasingly difficult. In [3], Benini and De Micheli cores would require a communication medium that can support believe that transmitting digital values on wires will be simultaneous high bandwidth data transfers with low latencies. inherently unreliable and nondeterministic. Other causes of On-chip packet switched interconnection architectures, called non-determinism include design components with a high level as Network-on-Chip (NoC), have been proposed as a solution of abstraction and coarse granularity and distributed for the communication challenges in the nanoscale regime [21]. communication control. As emphasized in the ITRS 2003 On-chip networks relate closely to interconnection networks document, it is very important, especially at system level, to for high-performance parallel computers with multiple separate the computation from communication, as they are processors, in which each processor is an individual chip. Like orthogonal issues which should remain separate whenever multiprocessor interconnection networks, nodes are physically possible. Henceforth, SoC design should resemble the creation close to each other and have high link reliability. of large scale communication networks rather than traditional A NoC is a structured set of routers or switches that are IC design practice [3] [10]. connected to each other on a point to point link in order to Next generations of systems-on-chip (SoCs) will consist Of provide a communication backbone to the processing cores of a hundreds of pre-designed IP-cores assembled together to form SoC. Many design templates have been proposed for the future
Fault tolerance is the ability to survive failure of individual components and usually uses sever... more Fault tolerance is the ability to survive failure of individual components and usually uses several virtual channels (VCs) to overcome faulty nodes or links. One of the integral stages of designing Network-on-Chips is the development of an efficient communication system in order to provide low latency networks. We have evaluated a new fault-tolerant routing algorithm based on f-cube3 as a solution to increase the performance of the network in comparison with f-cube3 with better moved messages and lower message delay which uses less number of VCs in comparison with f-cube3. Moreover, in this method we show the improvement of the use of VCs per each physical link by reducing required channels to two. Furthermore, simulations of both algorithms based on same conditions have been presented. The results also show that our algorithm has better average of moved messages per faults in the network and better performance at 100% traffic load.
A famous wormhole-switched routing algorithm for mesh interconnection network called f-cube3 uses... more A famous wormhole-switched routing algorithm for mesh interconnection network called f-cube3 uses three virtual channels to pass faulty blocks, while only one virtual channel is used when a message does not encounter by fault. Routing with faults usually uses virtual channels to conquer faulty regions. One of the key issues in the design of Network-on-Chips (NoC) is the development of a well-organized communication system to provide high throughput interconnection network. We have evaluated if-cube3-a fault- ...
2009 Third Asia International Conference on Modelling & Simulation, 2009
This paper proposes a performance-enhancing fault-tolerant routing algorithm based on f-cube3 as ... more This paper proposes a performance-enhancing fault-tolerant routing algorithm based on f-cube3 as a new solution for increasing the rate of switched and routed packets in NoCs. The f-cube3 algorithm is a wormhole-switched routing for 2-D mesh networks and has been used for block faults such as f-ring and f-chain. We have enhanced the use of virtual channels per each physical link without adding new extra virtual channel. It is proposed that when a message is not blocked by fault, all virtual channels could be used. We have simulated both f-cube3 and our algorithm for the same conditions; message length, network size, traffic etc. As the simulation results show, our algorithm has a higher saturation point than f-cube3 algorithm. The results also show that our algorithm has more utilization of links and less blocked messages rate than f-cube3.
2009 Third Asia International Conference on Modelling & Simulation, 2009
We have simulated both f-cube3 and our algorithm for the same conditions; message length, network... more We have simulated both f-cube3 and our algorithm for the same conditions; message length, network size, traffic etc. As the simulation results show, our algorithm has a higher saturation point than f-cube3 algorithm. The results also show that our algorithm has more utilization of links and less blocked messages rate than f-cube3.
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Papers by Arshin Rezazadeh