Papers by E. Swartzlander
Systolic Signal Processing Systems
ELECTRICAL ENGINEERING AND ELECTRONICS A Series of Reference Books and Textbooks Editors Martin O... more ELECTRICAL ENGINEERING AND ELECTRONICS A Series of Reference Books and Textbooks Editors Martin O. Thurston William Middendorf Department of Electrical Department of Electrical Engineering and Computer Engineering The Ohio State University University of ...
IEEE Transactions on Signal Processing, 1999
The discrete wavelet transform is currently attracting much interest among researchers and practi... more The discrete wavelet transform is currently attracting much interest among researchers and practitioners as a powerful tool for a wide variety of digital signal and imaging processing applications. This correspondence presents an efficient approach to compute the twodimensional (2-D) discrete wavelet transform in standard form on parallel general-purpose computers. This approach does not require transposition of intermediate results and avoids interprocessor communication. Since it is based on matrix-vector multiplication, our technique does not introduce any restriction on the size of the input data or on the transform parameters. Complete use of the available processor parallelism, modularity, and scalability are achieved. Theoretical and experimental evaluations and comparisons are given with respect to traditional parallelization.
A modular pipelined implementation of large fast Fourier transforms
Conference Record of the Thirty-Sixth Asilomar Conference on Signals, Systems and Computers, 2002., 2002
ABSTRACT
An architecture for a radix-4 modular pipeline fast Fourier transform
Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. ASAP 2003, 2003
ABSTRACT
Parallel implementation of a fast third-order Volterra digital filter
Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97, 1997
ABSTRACT
Fault tolerant Newton-Raphson dividers using time shared TMR
Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 1996
The Newton-Raphson method is a popular means of performing division on modern processors, as it c... more The Newton-Raphson method is a popular means of performing division on modern processors, as it can utilize the multiplication hardware already on chip and converge quickly to a solution. However, high-precision multiplications are not required for the early iterations of the algorithm. Furthermore, rounding the quotient by computing the inverse function may not require a full precision computation. By using
1996 IEEE International Conference on Acoustics, Speech, and Signal Processing Conference Proceedings, 1996
The CORDIC algorithm is a powerful tool for computing trigonometric functions (sine and cosine) a... more The CORDIC algorithm is a powerful tool for computing trigonometric functions (sine and cosine) and some transcendental functions (hyperbolic sine and cosine) at a circuit complexity suited for physical implementation by using VLSI technologies.
Serial Parallel Multiplier Design in Quantum-dot Cellular Automata
18th IEEE Symposium on Computer Arithmetic (ARITH '07), 2007
... This tool allows users to do a custom layout and then verify QCA circuit functionality by sim... more ... This tool allows users to do a custom layout and then verify QCA circuit functionality by simulations. ... Figure 8. Bit product matrix for unsigned mul-tiplication Let (ai,bi) be the multiplicand and multiplier pair and pi be the product sum of the bit position i. Bits ai and pi correspond to ...
International journal of bio-medical computing, 1979
In order to achieve the computational capability to carry out many thousands of cross-sectional r... more In order to achieve the computational capability to carry out many thousands of cross-sectional reconstructions, necessary to support a prototype high temporal and spatial resolution cylindrical scanning multiaxial tomographic unit, a series of design, software simulation, and fabrication studies is underway to develop a special-purpose high-speed reconstruction computer. This processor will rely upon integrated circuit arithmetic components of advanced design, and highly parallel architecture to execute X-ray based transaxial reconstruction algorithms at the rate of hundreds of cross sections/sec.
35+ years of computer arithmetic: a view from the trenches
ABSTRACT
Characterization and analysis of errors in circuit test
Proceedings of International Workshop on Defect and Fault Tolerance in VLSI, 1995
ABSTRACT
Error modeling in board test
Proceedings of 3rd International Workshop on the Economics of Design, Test and Manufacturing, 1996
ABSTRACT
Fast transform processor implementation
ICASSP '84. IEEE International Conference on Acoustics, Speech, and Signal Processing, 1984
ABSTRACT
Proceedings IEEE International Conference on Wafer Scale Integration (ICWSI), 1995
VLSI, MCM and WSI technologies are compared on the basis of silicon area, substrate size and powe... more VLSI, MCM and WSI technologies are compared on the basis of silicon area, substrate size and power consumption. Theoretical estimates for these parameters are developed and then illustrated by examining the design of a radix-4 FFT butterfly processing element. The MCM implementation should cost the least in production, but it is the largest and consumes the most power.
The case for application specific computing
Proceedings of the International Conference on Application Specific Array Processors, 1991
Application specific computing is the only way to solve many computationally intensive problems. ... more Application specific computing is the only way to solve many computationally intensive problems. In contrast to general purpose computing, application specific computing can achieve high throughput, small size, and (for CMOS realizations) low power. The improvement in the area time product is often in excess of two orders of magnitude. This paper reviews past endeavors in special purpose processing, current research in application specific array processing, and offers the prediction that in the near future `system compilation' will greatly facilitate the development of application specific computers
Optimizing adders for WSI
[1992] Proceedings International Conference on Wafer Scale Integration, 1992
The authors report on the speed and dynamic power dissipation of CMOS implementations of six diff... more The authors report on the speed and dynamic power dissipation of CMOS implementations of six different adders. The adders are constructed with inverters and two-to-four-input AND and OR gates. A figure of merit is presented that can be used to compare the adders based on their delay and relative dynamic power consumption. This figure of merit provides a common ground
Exact rounding of certain elementary functions
Proceedings of IEEE 11th Symposium on Computer Arithmetic, 1993
An algorithm is described which produces exactly rounded results for the functions of reciprocal,... more An algorithm is described which produces exactly rounded results for the functions of reciprocal, square root, 2x, and Iogz(x). Hardware designs based on this algorithm are presented for floating point numbers with 16 and 24 bit significands. These designs use a ...
Asilomar Conference on Signals, Systems & Computers, 1996
This paper examines the optimization of the 64-bit spanning tree carry lookahead adder by sizing ... more This paper examines the optimization of the 64-bit spanning tree carry lookahead adder by sizing the transistors in the different Manchester carry chain blocks and by adjusting the block widths within the carry tree to reduce the critical delay paths of the carry signals. Previous spanning tree designs are re-simulated using HSPICE, with parameters for a 0.35 μm CMOS process,
Design of Radix 4 SRT Dividers for Single Precision DSP in Deep Submicron CMOS Technology
2006 IEEE International Symposium on Signal Processing and Information Technology, 2006
Page 1. Design of Radix 4 SRT Dividers for Single Precision DSP in Deep Submicron CMOS Technology... more Page 1. Design of Radix 4 SRT Dividers for Single Precision DSP in Deep Submicron CMOS Technology Tung N. Pham and Earl E. Swartzlander, Jr. Department of Electrical and Computer Engineering The University of Texas at Austin Austin, TX 78712 ...
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Papers by E. Swartzlander