{"id":2515,"date":"2023-03-05T04:44:19","date_gmt":"2023-03-05T04:44:19","guid":{"rendered":"https:\/\/usemynotes.com\/?p=2515"},"modified":"2025-11-13T22:56:42","modified_gmt":"2025-11-13T17:26:42","slug":"instruction-cycle-in-microprocessor","status":"publish","type":"post","link":"https:\/\/usemynotes.com\/instruction-cycle-in-microprocessor\/","title":{"rendered":"Instruction Cycle in Microprocessor and Timing Diagram in Microprocessor"},"content":{"rendered":"<p>In this course, we will study what is <strong>Instruction Cycle in Microprocessor<\/strong> and the <strong>Timing Diagram in Microprocessor<\/strong> &amp; <strong>machine cycles in Microprocessor.<\/strong> So let us start.<\/p>\n<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_80 counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/p>\n<span class=\"ez-toc-title-toggle\"><a href=\"#\" class=\"ez-toc-pull-right ez-toc-btn ez-toc-btn-xs ez-toc-btn-default ez-toc-toggle\" aria-label=\"Toggle Table of Content\"><span class=\"ez-toc-js-icon-con\"><span class=\"\"><span class=\"eztoc-hide\" style=\"display:none;\">Toggle<\/span><span class=\"ez-toc-icon-toggle-span\"><svg style=\"fill: #999;color:#999\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" class=\"list-377408\" width=\"20px\" height=\"20px\" viewBox=\"0 0 24 24\" fill=\"none\"><path d=\"M6 6H4v2h2V6zm14 0H8v2h12V6zM4 11h2v2H4v-2zm16 0H8v2h12v-2zM4 16h2v2H4v-2zm16 0H8v2h12v-2z\" fill=\"currentColor\"><\/path><\/svg><svg style=\"fill: #999;color:#999\" class=\"arrow-unsorted-368013\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" width=\"10px\" height=\"10px\" viewBox=\"0 0 24 24\" version=\"1.2\" baseProfile=\"tiny\"><path d=\"M18.2 9.3l-6.2-6.3-6.2 6.3c-.2.2-.3.4-.3.7s.1.5.3.7c.2.2.4.3.7.3h11c.3 0 .5-.1.7-.3.2-.2.3-.5.3-.7s-.1-.5-.3-.7zM5.8 14.7l6.2 6.3 6.2-6.3c.2-.2.3-.5.3-.7s-.1-.5-.3-.7c-.2-.2-.4-.3-.7-.3h-11c-.3 0-.5.1-.7.3-.2.2-.3.5-.3.7s.1.5.3.7z\"\/><\/svg><\/span><\/span><\/span><\/a><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1 eztoc-toggle-hide-by-default' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/usemynotes.com\/instruction-cycle-in-microprocessor\/#Instruction_Cycle_in_Microprocessor\" >Instruction Cycle in Microprocessor<\/a><ul class='ez-toc-list-level-3' ><li class='ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/usemynotes.com\/instruction-cycle-in-microprocessor\/#Fetch_Instruction_Cycle_in_Microprocessor\" >Fetch Instruction Cycle in Microprocessor<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/usemynotes.com\/instruction-cycle-in-microprocessor\/#Decode_Instruction_Cycle_in_Microprocessor\" >Decode Instruction Cycle in Microprocessor<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/usemynotes.com\/instruction-cycle-in-microprocessor\/#Reading_effective_address_Instruction_Cycle_in_Microprocessor\" >Reading effective address Instruction Cycle in Microprocessor<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/usemynotes.com\/instruction-cycle-in-microprocessor\/#Execution_Instruction_Cycle_in_Microprocessor\" >Execution Instruction Cycle in Microprocessor<\/a><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/usemynotes.com\/instruction-cycle-in-microprocessor\/#Machine_Cycles_in_Microprocessor\" >Machine Cycles in Microprocessor<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/usemynotes.com\/instruction-cycle-in-microprocessor\/#What_are_the_T_states_in_Microprocessor\" >What are the T states in Microprocessor?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/usemynotes.com\/instruction-cycle-in-microprocessor\/#Timing_Diagram_in_Microprocessor\" >Timing Diagram in Microprocessor<\/a><\/li><\/ul><\/nav><\/div>\n<h2><span class=\"ez-toc-section\" id=\"Instruction_Cycle_in_Microprocessor\"><\/span>Instruction Cycle in Microprocessor<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>The time required for the completion or execution of one instruction is known as the Instruction Cycle in Microprocessor. The instruction cycle consists of a &#8211;<\/p>\n<ul>\n<li>Fetch Instruction Cycle in Microprocessor<\/li>\n<li>Decoding Instruction Cycle in Microprocessor<\/li>\n<li>Reading effective address Instruction Cycle in Microprocessor<\/li>\n<li>Execution Instruction Cycle in Microprocessor<\/li>\n<\/ul>\n<p><img decoding=\"async\" class=\"alignnone wp-image-2521 size-full\" src=\"https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/instruction-cycle.jpg\" alt=\"Instruction Cycle in Microprocessor\" width=\"1000\" height=\"972\" title=\"\" srcset=\"https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/instruction-cycle.jpg 1000w, https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/instruction-cycle-300x292.jpg 300w, https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/instruction-cycle-768x746.jpg 768w, https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/instruction-cycle-150x146.jpg 150w, https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/instruction-cycle-696x677.jpg 696w, https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/instruction-cycle-432x420.jpg 432w\" sizes=\"(max-width: 1000px) 100vw, 1000px\" \/><\/p>\n<h3><span class=\"ez-toc-section\" id=\"Fetch_Instruction_Cycle_in_Microprocessor\"><\/span>Fetch Instruction Cycle in Microprocessor<span class=\"ez-toc-section-end\"><\/span><\/h3>\n<p>The next instruction is fetched by the address stored in the program counter (PC) and then stored in the instruction register.<\/p>\n<h3><span class=\"ez-toc-section\" id=\"Decode_Instruction_Cycle_in_Microprocessor\"><\/span>Decode Instruction Cycle in Microprocessor<span class=\"ez-toc-section-end\"><\/span><\/h3>\n<p>The decoder interprets the encoded instruction from the instruction register.<\/p>\n<h3><span class=\"ez-toc-section\" id=\"Reading_effective_address_Instruction_Cycle_in_Microprocessor\"><\/span>Reading effective address Instruction Cycle in Microprocessor<span class=\"ez-toc-section-end\"><\/span><\/h3>\n<p>The address given in the instruction is read from the main memory and the required data is fetched. It depends on the direct addressing mode or the indirect addressing mode.<\/p>\n<h3><span class=\"ez-toc-section\" id=\"Execution_Instruction_Cycle_in_Microprocessor\"><\/span>Execution Instruction Cycle in Microprocessor<span class=\"ez-toc-section-end\"><\/span><\/h3>\n<p>It consists of the memory read (MR), memory write (MW), input-output read (IOR) and input-output write (IOW).<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Machine_Cycles_in_Microprocessor\"><\/span>Machine Cycles in Microprocessor<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<ul>\n<li>The time which is required for accessing the memory or input\/output devices is called a machine cycle in a <a href=\"https:\/\/usemynotes.com\/microprocessor\/\">Microprocessor<\/a>.<\/li>\n<li>One to four machine cycles are used.<\/li>\n<li>For example, memory reading, memory writing, opcode fetches, etc.<\/li>\n<li>One machine cycle is equal to 12 clocks.<\/li>\n<li>One machine cycle consists of 6 states.<\/li>\n<\/ul>\n<h2><span class=\"ez-toc-section\" id=\"What_are_the_T_states_in_Microprocessor\"><\/span>What are the T states in Microprocessor?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<ul>\n<li>It is one subdivision of the operation performed in one clock period.<\/li>\n<li>It is part of the machine cycle.<\/li>\n<li>One clock period is equal to one t state.<\/li>\n<li>One machine cycle is equal to 12 t states.<\/li>\n<\/ul>\n<h2><span class=\"ez-toc-section\" id=\"Timing_Diagram_in_Microprocessor\"><\/span>Timing Diagram in Microprocessor<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>The timing <a href=\"https:\/\/usemynotes.com\/8085-pin-diagram-in-microprocessor\/\">diagram in Microprocessor<\/a> is a graphical representation. It is used for the representation of the execution time taken by each instruction in a graphical format. The t states represent the timing diagrams.<\/p>\n<p><img decoding=\"async\" class=\"wp-image-2518 size-full aligncenter\" src=\"https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/timing-diagrams.png\" alt=\"Timing Diagram in Microprocessor\" width=\"631\" height=\"377\" title=\"\" srcset=\"https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/timing-diagrams.png 631w, https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/timing-diagrams-300x179.png 300w, https:\/\/usemynotes.com\/wp-content\/uploads\/2023\/02\/timing-diagrams-150x90.png 150w\" sizes=\"(max-width: 631px) 100vw, 631px\" \/><\/p>\n<ol>\n<li><strong>CLOCK<\/strong> &#8211; It is the clock pulse provided to the user.<\/li>\n<li><strong>AD0-AD7<\/strong> &#8211; These are used to carry data and addresses. It is the lower address bus. The decision of when it will carry an address and when it will carry data is made by ALE.<\/li>\n<li><strong>A8-A15<\/strong>&#8211; It is used to carry the address bits.<\/li>\n<li><strong>ALE\u00a0<\/strong>&#8211; It provides the signal for multiplexed addresses and data buses. If the signal is high or 1, a multiplexed address and data bus will be used as an address bus. To fetch a lower bit of address, the signal is 1 so that the multiplexed bus can act as an address bus. If the signal is low or 0, the multiplexed bus will be used as the data bus. When a lower bit of address is fetched then it will act as a data bus as the signal is low.<\/li>\n<li><strong>RD (low active)<\/strong> &#8211; If the signal is high or 1, no data is read by the microprocessor. If the signal is low or 0, data is read by the microprocessor.<\/li>\n<li><strong>WR (low active)<\/strong> &#8211; If the signal is high or 1, no data is written by the microprocessor. If the signal is low or 0, data is written by the microprocessor.<\/li>\n<li><strong>IO\/M (low active) and S1, S0<\/strong> &#8211; If the signal is high or 1, the operation is performed on the input-output. If the signal is low or 0, the operation is performed on memory.<\/li>\n<\/ol>\n<p>Thanks for giving your time to us for learning <strong>Instruction Cycle in Microprocessor<\/strong> and <strong>Timing Diagram in Microprocessor<\/strong>. I hope you like this tutorial.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>In this course, we will study what is Instruction Cycle in Microprocessor and the Timing Diagram in Microprocessor &amp; machine cycles in Microprocessor. So let us start. Instruction Cycle in Microprocessor The time required for the completion or execution of one instruction is known as the Instruction Cycle in Microprocessor. The instruction cycle consists of [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":2521,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[184],"tags":[],"class_list":{"0":"post-2515","1":"post","2":"type-post","3":"status-publish","4":"format-standard","5":"has-post-thumbnail","7":"category-microprocessor"},"_links":{"self":[{"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/posts\/2515","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/comments?post=2515"}],"version-history":[{"count":1,"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/posts\/2515\/revisions"}],"predecessor-version":[{"id":9167,"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/posts\/2515\/revisions\/9167"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/media\/2521"}],"wp:attachment":[{"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/media?parent=2515"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/categories?post=2515"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/usemynotes.com\/wp-json\/wp\/v2\/tags?post=2515"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}