Luc Morin

University of Quebec, Applied science, Retired

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Long time researcher in digital system design.

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Ney L V Calazans

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Alessandro Ide

Ney Laert L V Vilar Calazans

Universidade Federal do Rio Grande do Sul

NTUA

Politecnico di Torino

karthika parthasarathy

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Papers by Luc Morin

A 2005 review of FPGA arithmetic (abstract only)

This article is a concise literature review of the actual state of the art in arithmetic for fiel... more

A modeling technique for specification and simulation of digital systems

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Logic models for continuous time

IEE proceedings, 1997

Logic simulation has been used for decades and is now part of all CAD systems and yet theoretical... more Logic simulation has been used for decades and is now part of all CAD systems and yet theoretical aspects of the analogue-to-digital abstraction still need to be studied and formalised. The paper discusses the preservation of analogue circuit properties (continuity, causality and time invariance), during the construction of logic models. Modelling the analogue circuit behaviour and constructing a logic model requires a transformation of the continuous change of state into a timed state sequence. A new parsing algorithm, called a continuous time automaton, is proposed to solve the problem. As for all parsing algorithms, this logic modelling technique leads to simple and efficient simulation algorithms. The paper is concerned with the theoretical aspects and leaves the door open for the practitioner to study reallife benefits. A formal approach should provide a solid foundation for device specification and modelling.

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A new bit-serial multiplier architecture for area-efficient fpga implementation

Circuits, Signals, and Systems, 2004

... References [1] Y.-N. Chang , JH Satyanarayana and KK Parhi, Design and Implementation of Low-... more

Design of synchronisers: a review

IEE proceedings, 1989

ABSTRACT

Design of synchronisers: a review

IEE Proceedings E Computers and Digital Techniques, 1989

ABSTRACT

Logic models for continuous time

IEE Proceedings - Computers and Digital Techniques, 1997

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Method for compiling and executing a parallel program

A modeling technique for specification and simulation of digital systems

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A 2005 review of FPGA arithmetic (abstract only)

Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays, 2005

This article is a concise literature review of the actual state of the art in arithmetic for fiel... more

Rapid prototyping of the Goertzel algorithm for hardware acceleration of exon prediction

by Luc Morin and Michel Voyer

2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2011

This paper presents a novel hardware architecture for the Goertzel algorithm used in exon predict... more This paper presents a novel hardware architecture for the Goertzel algorithm used in exon prediction. It also describes the rapid-prototyping methodology for the implementation of this system. The approach used in this work relies on a top-down philosophy which starts from a MATLAB model and ends in a hardware implementation on FPGA. The design was implemented on a PCI FPGA board installed in the PC. The algorithm was implemented in C++ and with Novakod Studio using the parallel synchronous C (psC) language. With this development environment, the design and implementation time of the FPGA module was greatly reduced. The resulting program successfully identified coding regions in DNA sequences. I.

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A New Bit-Serial Multiplier Architecture for Area-Efficient Fpga Implementation

actapress.com

... References [1] Y.-N. Chang , JH Satyanarayana and KK Parhi, Design and Implementation of Low-... more

Books by Luc Morin

FPGAs for Everyone, The psC Language Reference Manual

This book presents a new technology for programming FPGAs. The psC language and the Novakod Studi... more This book presents a new technology for programming FPGAs. The psC language and the Novakod Studio IDE make FPGA programming accessible to C++ developers. All you need is a little C++, and you will easily learn psC to program FPGAs. The psC compiler generates high quality VHDL code that can be inserted in any Vivado or Quartus project. In addition, the CYCLE-ACCURATE HIGH-LEVEL SIMULATOR gives you WYSIWYG (What You Simulate Is What You Get) on the real FPGA. A paperback edition is available on Amazon.

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A 2005 review of FPGA arithmetic (abstract only)

This article is a concise literature review of the actual state of the art in arithmetic for fiel... more

A modeling technique for specification and simulation of digital systems

Download

Logic models for continuous time

IEE proceedings, 1997

Download

A new bit-serial multiplier architecture for area-efficient fpga implementation

Circuits, Signals, and Systems, 2004

... References [1] Y.-N. Chang , JH Satyanarayana and KK Parhi, Design and Implementation of Low-... more

Design of synchronisers: a review