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james smith

University of Melbourne, Medicine Dentistry and Health Sciences, Post-Doc

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Indian Institute Of Technology, Roorkee

Martin Burtscher

Universitat Politecnica de Catalunya

Delft University of Technology

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Papers by james smith

Many high performance processors predict conditional branches and consume processor resources bas... more Many high performance processors predict conditional
branches and consume processor resources based
on the prediction. In some situations, resource allocation
can be better optimized if a confidence level is assigned to
a branch prediction; i.e. if the quantity of resources allocated
is a function of the confidence level. To support
such optimizations, we consider hardware mechanisms
that partition conditional branch predictions into two
sets: those which are accurate a relatively high percentage
of the time, and those which are accurate a relatively
low percentage of the time. The objective is to concentrate
as many of the mispredictions as practical into a
relatively small set of low confidence dynamic branches.

Equilibrium in Auctions with Entry

Page 1. Equilibrium in Auctions with Entry By DAN LEVIN AND JAMES L. SMITH* We model entry incent... more

Equilibrium in Auctions with Entry

Page 1. Equilibrium in Auctions with Entry By DAN LEVIN AND JAMES L. SMITH* We model entry incent... more

Black Economic Progress after Myrdal

Page 1. Journal of Economic Literature Vol. XXVII (June 1989), pp. 519-564 Black Economic Progres... more

DNA microarrays for comparative genomic hybridization based on DOP-PCR amplification of BAC and PAC clones

Genes Chromosomes & Cancer, 2003

We have designed DOP-PCR primers specifically for the amplification of large insert clones for us... more We have designed DOP-PCR primers specifically for the amplification of large insert clones for use in the construction of DNA microarrays. A bioinformatic approach was used to construct primers that were efficient in the general amplification of human DNA but were poor at amplifying E. coli DNA, a common contaminant of DNA preparations from large insert clones. We chose the three most selective primers for use in printing DNA microarrays. DNA combined from the amplification of large insert clones by use of these three primers and spotted onto glass slides showed more than a sixfold increase in the human to E. coli hybridization ratio when compared to the standard DOP-PCR primer, 6MW. The microarrays reproducibly delineated previously characterized gains and deletions in a cancer cell line and identified a small gain not detected by use of conventional CGH. We also describe a method for the bulk testing of the hybridization characteristics of chromosome-specific clones spotted on microarrays by use of DNA amplified from flow-sorted chromosomes. Finally, we describe a set of clones selected from the publicly available Golden Path of the human genome at 1-Mb intervals and a view in the Ensembl genome browser from which data required for the use of these clones in array CGH and other experiments can be downloaded across the Internet. © 2003 Wiley-Liss, Inc.

DNA microarrays for comparative genomic hybridization based on DOP-PCR amplification of BAC and PAC clones

Genes Chromosomes & Cancer, 2003

We have designed DOP-PCR primers specifically for the amplification of large insert clones for us... more We have designed DOP-PCR primers specifically for the amplification of large insert clones for use in the construction of DNA microarrays. A bioinformatic approach was used to construct primers that were efficient in the general amplification of human DNA but were poor at amplifying E. coli DNA, a common contaminant of DNA preparations from large insert clones. We chose the three most selective primers for use in printing DNA microarrays. DNA combined from the amplification of large insert clones by use of these three primers and spotted onto glass slides showed more than a sixfold increase in the human to E. coli hybridization ratio when compared to the standard DOP-PCR primer, 6MW. The microarrays reproducibly delineated previously characterized gains and deletions in a cancer cell line and identified a small gain not detected by use of conventional CGH. We also describe a method for the bulk testing of the hybridization characteristics of chromosome-specific clones spotted on microarrays by use of DNA amplified from flow-sorted chromosomes. Finally, we describe a set of clones selected from the publicly available Golden Path of the human genome at 1-Mb intervals and a view in the Ensembl genome browser from which data required for the use of these clones in array CGH and other experiments can be downloaded across the Internet. © 2003 Wiley-Liss, Inc.

Strongly Fault Secure Logic Networks

IEEE Transactions on Computers, 1978

Strongly fault secure logic networks are defined and are shown to include totally self-checking n... more Strongly fault secure logic networks are defined and are shown to include totally self-checking networks as a special case. Strongly fault secure networks provide the same protection against assumed faults as totally self-checking networks, and it is shown that when stuck-at faults are assumed a strongly fault secure network can be easily modified to form a totally self-checking network. A class of strongly fault secure networks is defined in terms of network structure. This structural definition of these "path fault secure" networks facilitates their design and implies other interesting properties. Finally, networks that are strongly fault secure with respect to single stuck-at faults are discussed. A large class of these networks is shown to be easily characterized, and network behavior under nonmodeled faults is considered.

Assigning confidence to conditional branch predictions

Many high performance processors predict conditional branches and consume processor resources bas... more Many high performance processors predict conditional branches and consume processor resources based on the prediction. In some situations, resource allocation can be better optimized if a confidence level is assigned to a branch prediction; i.e. if the quantity of resources allocated is a function of the confidence level. To support such optimizations, we consider hardware mechanisms that partition conditional branch predictions into two sets: those which are accurate a relatively high percentage of the time, and those which are accurate a relatively low percentage of the time. The objective is to concentrate as many of the mispredictions as practical into a relatively small set of low confidence dynamic branches.

Assigning confidence to conditional branch predictions

Many high performance processors predict conditional branches and consume processor resources bas... more Many high performance processors predict conditional branches and consume processor resources based on the prediction. In some situations, resource allocation can be better optimized if a confidence level is assigned to a branch prediction; i.e. if the quantity of resources allocated is a function of the confidence level. To support such optimizations, we consider hardware mechanisms that partition conditional branch predictions into two sets: those which are accurate a relatively high percentage of the time, and those which are accurate a relatively low percentage of the time. The objective is to concentrate as many of the mispredictions as practical into a relatively small set of low confidence dynamic branches.

Characterizing computer performance with a single number

Communications of The ACM, 1988

The controversy surrounding single number performance reduction is examined and solutions are sug... more

The economics and econometrics of active labour market programs

Decoupled access/execute computer architectures

ACM Sigarch Computer Architecture News, 1982

An architecture for improving computer performance is presented and discussed. The main feature o... more An architecture for improving computer performance is presented and discussed. The main feature of the architecture is a high degree of decoupling between operand access and execution. This results in an implementation which has two separate instruction streams that communicate via queues. A similar architecture has been previously proposed for array processors, but in that context the software is called

Speculative Versioning Cache

Dependences among loads and stores whose addresses are unknown hinder the extraction of instructi... more Dependences among loads and stores whose addresses are unknown hinder the extraction of instruction level parallelism during the execution of a sequential program. Such ambiguous memory dependences can be overcome by memory dependence speculation which enables a load or store to be speculatively executed before the addresses of all preceding loads and stores are known. Furthermore, multiple speculative stores to a memory location create multiple speculative versions of the location. Program order among the speculative versions must be tracked to maintain sequential semantics. A previously proposed approach, the address resolution buffer (ARB) uses a centralized buffer to support speculative versions. Our proposal, called the speculative versioning cache (SVC), uses distributed caches to eliminate the latency and bandwidth problems of the ARB. The SVC conceptually unifies cache coherence and speculative versioning by using an organization similar to snooping bus-based coherent caches. A preliminary evaluation for the multiscalar architecture shows that hit latency is an important factor affecting performance, and private cache solutions trade-off hit rate for hit latency

Healthy Bodies and Thick Wallets: The Dual Relation between Health and Economic Status

Journal of Economic Perspectives, 1999

Implementing Precise Interrupts in Pipelined Processors

IEEE Transactions on Computers, 1988

This paper describes and evaluates solutions to the precise interrupt problem in pipelined proces... more This paper describes and evaluates solutions to the precise interrupt problem in pipelined processors. An interrupt is precise if the saved process state corresponds with a sequential model of program execution where one instruction completes before the next begins. In a pipelined processor, precise interrupts are difficult to implement because an instruction may be initiated before its predecessors have completed.

Implementation of precise interrupts in pipelined processors

ACM Sigarch Computer Architecture News, 1985

This paper describes and evaluates solutions to the precise interrupt problem in pipelined proces... more This paper describes and evaluates solutions to the precise interrupt problem in pipelined processors. An interrupt is precise if the saved process state corresponds with a sequential model of program execution where one instruction completes before the next begins. In a pipelined processor, precise interrupts are difficult to implement because an instruction may be initiated before its predecessors have completed.

The microarchitecture of superscalar processors

Proceedings of The IEEE, 1995

Superscalar processing is the latest in a long series of innovations aimed at producing ever-fast... more

Complexity-effective superscalar processors

ACM Sigarch Computer Architecture News, 1997

The performance tradeoff between hardware complexity and clock speed is studied. First, a generic... more The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, instruction window wakeup and selection logic, and operand bypassing are analyzed. Each is modeled and Spice simulated for feature sizes of

Early Lung Cancer Action Project: overall design and findings from baseline screening

Lancet, 1999

25 Fishman JA, Rubin RH. Medical progress: infection in organtransplant recipients. N Engl J Med ... more 25 Fishman JA, Rubin RH. Medical progress: infection in organtransplant recipients. N Engl J Med 1998; 338: 1741-51. 26 Niu MT, Coleman PJ, Alter MJ. Multicenter study of hepatitis C virus infection in chronic haemodialysis patients and haemodialysis center staff members. Am J Kidney Dis 1993; 22: 568-73. 27 Adami HO, Chow WH, Nyren O, et al. Excess risk of primary liver cancer in patients with diabetes mellitus.

Many high performance processors predict conditional branches and consume processor resources bas... more Many high performance processors predict conditional
branches and consume processor resources based
on the prediction. In some situations, resource allocation
can be better optimized if a confidence level is assigned to
a branch prediction; i.e. if the quantity of resources allocated
is a function of the confidence level. To support
such optimizations, we consider hardware mechanisms
that partition conditional branch predictions into two
sets: those which are accurate a relatively high percentage
of the time, and those which are accurate a relatively
low percentage of the time. The objective is to concentrate
as many of the mispredictions as practical into a
relatively small set of low confidence dynamic branches.

Equilibrium in Auctions with Entry

Page 1. Equilibrium in Auctions with Entry By DAN LEVIN AND JAMES L. SMITH* We model entry incent... more

Equilibrium in Auctions with Entry

Page 1. Equilibrium in Auctions with Entry By DAN LEVIN AND JAMES L. SMITH* We model entry incent... more

Black Economic Progress after Myrdal

Page 1. Journal of Economic Literature Vol. XXVII (June 1989), pp. 519-564 Black Economic Progres... more

DNA microarrays for comparative genomic hybridization based on DOP-PCR amplification of BAC and PAC clones

Genes Chromosomes & Cancer, 2003

We have designed DOP-PCR primers specifically for the amplification of large insert clones for us... more We have designed DOP-PCR primers specifically for the amplification of large insert clones for use in the construction of DNA microarrays. A bioinformatic approach was used to construct primers that were efficient in the general amplification of human DNA but were poor at amplifying E. coli DNA, a common contaminant of DNA preparations from large insert clones. We chose the three most selective primers for use in printing DNA microarrays. DNA combined from the amplification of large insert clones by use of these three primers and spotted onto glass slides showed more than a sixfold increase in the human to E. coli hybridization ratio when compared to the standard DOP-PCR primer, 6MW. The microarrays reproducibly delineated previously characterized gains and deletions in a cancer cell line and identified a small gain not detected by use of conventional CGH. We also describe a method for the bulk testing of the hybridization characteristics of chromosome-specific clones spotted on microarrays by use of DNA amplified from flow-sorted chromosomes. Finally, we describe a set of clones selected from the publicly available Golden Path of the human genome at 1-Mb intervals and a view in the Ensembl genome browser from which data required for the use of these clones in array CGH and other experiments can be downloaded across the Internet. © 2003 Wiley-Liss, Inc.

DNA microarrays for comparative genomic hybridization based on DOP-PCR amplification of BAC and PAC clones

Genes Chromosomes & Cancer, 2003

We have designed DOP-PCR primers specifically for the amplification of large insert clones for us... more We have designed DOP-PCR primers specifically for the amplification of large insert clones for use in the construction of DNA microarrays. A bioinformatic approach was used to construct primers that were efficient in the general amplification of human DNA but were poor at amplifying E. coli DNA, a common contaminant of DNA preparations from large insert clones. We chose the three most selective primers for use in printing DNA microarrays. DNA combined from the amplification of large insert clones by use of these three primers and spotted onto glass slides showed more than a sixfold increase in the human to E. coli hybridization ratio when compared to the standard DOP-PCR primer, 6MW. The microarrays reproducibly delineated previously characterized gains and deletions in a cancer cell line and identified a small gain not detected by use of conventional CGH. We also describe a method for the bulk testing of the hybridization characteristics of chromosome-specific clones spotted on microarrays by use of DNA amplified from flow-sorted chromosomes. Finally, we describe a set of clones selected from the publicly available Golden Path of the human genome at 1-Mb intervals and a view in the Ensembl genome browser from which data required for the use of these clones in array CGH and other experiments can be downloaded across the Internet. © 2003 Wiley-Liss, Inc.

Strongly Fault Secure Logic Networks

IEEE Transactions on Computers, 1978

Strongly fault secure logic networks are defined and are shown to include totally self-checking n... more Strongly fault secure logic networks are defined and are shown to include totally self-checking networks as a special case. Strongly fault secure networks provide the same protection against assumed faults as totally self-checking networks, and it is shown that when stuck-at faults are assumed a strongly fault secure network can be easily modified to form a totally self-checking network. A class of strongly fault secure networks is defined in terms of network structure. This structural definition of these "path fault secure" networks facilitates their design and implies other interesting properties. Finally, networks that are strongly fault secure with respect to single stuck-at faults are discussed. A large class of these networks is shown to be easily characterized, and network behavior under nonmodeled faults is considered.

Assigning confidence to conditional branch predictions

Many high performance processors predict conditional branches and consume processor resources bas... more Many high performance processors predict conditional branches and consume processor resources based on the prediction. In some situations, resource allocation can be better optimized if a confidence level is assigned to a branch prediction; i.e. if the quantity of resources allocated is a function of the confidence level. To support such optimizations, we consider hardware mechanisms that partition conditional branch predictions into two sets: those which are accurate a relatively high percentage of the time, and those which are accurate a relatively low percentage of the time. The objective is to concentrate as many of the mispredictions as practical into a relatively small set of low confidence dynamic branches.

Assigning confidence to conditional branch predictions

Many high performance processors predict conditional branches and consume processor resources bas... more Many high performance processors predict conditional branches and consume processor resources based on the prediction. In some situations, resource allocation can be better optimized if a confidence level is assigned to a branch prediction; i.e. if the quantity of resources allocated is a function of the confidence level. To support such optimizations, we consider hardware mechanisms that partition conditional branch predictions into two sets: those which are accurate a relatively high percentage of the time, and those which are accurate a relatively low percentage of the time. The objective is to concentrate as many of the mispredictions as practical into a relatively small set of low confidence dynamic branches.

Characterizing computer performance with a single number

Communications of The ACM, 1988

The controversy surrounding single number performance reduction is examined and solutions are sug... more

The economics and econometrics of active labour market programs

Decoupled access/execute computer architectures

ACM Sigarch Computer Architecture News, 1982

An architecture for improving computer performance is presented and discussed. The main feature o... more An architecture for improving computer performance is presented and discussed. The main feature of the architecture is a high degree of decoupling between operand access and execution. This results in an implementation which has two separate instruction streams that communicate via queues. A similar architecture has been previously proposed for array processors, but in that context the software is called

Speculative Versioning Cache

Dependences among loads and stores whose addresses are unknown hinder the extraction of instructi... more Dependences among loads and stores whose addresses are unknown hinder the extraction of instruction level parallelism during the execution of a sequential program. Such ambiguous memory dependences can be overcome by memory dependence speculation which enables a load or store to be speculatively executed before the addresses of all preceding loads and stores are known. Furthermore, multiple speculative stores to a memory location create multiple speculative versions of the location. Program order among the speculative versions must be tracked to maintain sequential semantics. A previously proposed approach, the address resolution buffer (ARB) uses a centralized buffer to support speculative versions. Our proposal, called the speculative versioning cache (SVC), uses distributed caches to eliminate the latency and bandwidth problems of the ARB. The SVC conceptually unifies cache coherence and speculative versioning by using an organization similar to snooping bus-based coherent caches. A preliminary evaluation for the multiscalar architecture shows that hit latency is an important factor affecting performance, and private cache solutions trade-off hit rate for hit latency

Healthy Bodies and Thick Wallets: The Dual Relation between Health and Economic Status

Journal of Economic Perspectives, 1999

Implementing Precise Interrupts in Pipelined Processors

IEEE Transactions on Computers, 1988

This paper describes and evaluates solutions to the precise interrupt problem in pipelined proces... more This paper describes and evaluates solutions to the precise interrupt problem in pipelined processors. An interrupt is precise if the saved process state corresponds with a sequential model of program execution where one instruction completes before the next begins. In a pipelined processor, precise interrupts are difficult to implement because an instruction may be initiated before its predecessors have completed.

Implementation of precise interrupts in pipelined processors

ACM Sigarch Computer Architecture News, 1985

This paper describes and evaluates solutions to the precise interrupt problem in pipelined proces... more This paper describes and evaluates solutions to the precise interrupt problem in pipelined processors. An interrupt is precise if the saved process state corresponds with a sequential model of program execution where one instruction completes before the next begins. In a pipelined processor, precise interrupts are difficult to implement because an instruction may be initiated before its predecessors have completed.

The microarchitecture of superscalar processors

Proceedings of The IEEE, 1995

Superscalar processing is the latest in a long series of innovations aimed at producing ever-fast... more

Complexity-effective superscalar processors

ACM Sigarch Computer Architecture News, 1997

The performance tradeoff between hardware complexity and clock speed is studied. First, a generic... more The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, instruction window wakeup and selection logic, and operand bypassing are analyzed. Each is modeled and Spice simulated for feature sizes of

Early Lung Cancer Action Project: overall design and findings from baseline screening

Lancet, 1999

25 Fishman JA, Rubin RH. Medical progress: infection in organtransplant recipients. N Engl J Med ... more 25 Fishman JA, Rubin RH. Medical progress: infection in organtransplant recipients. N Engl J Med 1998; 338: 1741-51. 26 Niu MT, Coleman PJ, Alter MJ. Multicenter study of hepatitis C virus infection in chronic haemodialysis patients and haemodialysis center staff members. Am J Kidney Dis 1993; 22: 568-73. 27 Adami HO, Chow WH, Nyren O, et al. Excess risk of primary liver cancer in patients with diabetes mellitus.