tag: simulation

Why Simulation Speed Is Holding Chiplets Back
By Nilesh Kamdar - 04 Aug, 2026 - Comments: 0

Chiplets are mainstream. The semiconductor industry has moved past the question of whether to adopt them and is now focused on scaling. IDTechEx confirms the technology is playing a crucial role across data centers, AI infrastructure, telecom, and automotive, helping overcome scaling limits, improving yields, and lowering costs. For design teams transitioning to the modular architecture, th... » read more

Untangling Chip Traffic Jams
By Liz Allan - 23 Jul, 2026 - Comments: 0

Key Takeaways: Defining all possible cases of coherent and non-coherent traffic is non-trivial, and designers need to use a mix of hardware-assisted verification and simulation tools to do so. For NoCs connecting multiple dies, simulation is challenging due to the very large number of interconnects and multiphysics issues involving thermal and crosstalk. Advanced verification approac... » read more

Accelerating AMS Verification With Mixed-Signal Visualizer
By Siemens EDA - 23 Jul, 2026 - Comments: 0

Debugging now consumes approximately 47 percent of integrated circuit (IC) verification time due to increasing semiconductor design complexity. Analog mixed-signal (AMS) verification presents unique challenges, as engineers must correlate continuous analog behavior with discrete digital logic across multiple abstraction levels, hierarchical configurations, and voltage domains. Traditional wa... » read more

From Feature-Scale Simulation To Digital Twins: Helping Process Engineers Tackle Growing Complexity
By Saurabh Suryavanshi - 16 Jul, 2026 - Comments: 0

For process engineers facing rising manufacturing complexity, physics-based simulation provides the foundation for understanding what is happening on the wafer. AI, automation, and digital twins become powerful only when they build on that foundation, enabling faster exploration without losing trust, calibration, or engineering judgment. The growing challenge of semiconductor manufacturing Se... » read more

Continuous Physics Reasoning:
Definition, Minimum Criteria, and the Role of Foundation Models for Physics
By Vinci - 24 Jun, 2026 - Comments: 0

Abstract Physical products are increasingly constrained by thermal, mechanical, electrical, and manufacturing realities, yet much of industry still relies on intermittent, expert-mediated physics evaluation. As systems become more complex and tightly coupled, this limits not only product development, but also manufacturing readiness, operational efficiency, and lifecycle performance. This p... » read more

Fault Injection Framework Targets RISC-V Security Weak Spots
By - 14 Jun, 2026 - Comments: 0

Researchers from Politecnico di Torino and CEA-List published a technical paper titled “InjectV: Modeling Fault Injection Attacks in RISC-V Simulation Environment.” Abstract "Fault Injection Attacks (FIAs) are a significant threat to hardware security, capable of compromising systems by inducing malicious faults in computation or storage. Evaluating resilience against such attacks is chal... » read more

Deterministic, Solver-Accurate Thermal and Warpage Analysis at Manufacturing Resolution for Advanced 2.5D HBM Packages
By Vinci - 27 May, 2026 - Comments: 0

Thermal management has become the defining bottleneck in high-performance computing (HPC) and AI accelerator packaging. Modern packages integrate high-power ASICs with multiple High Bandwidth Memory (HBM) stacks on a silicon interposer, creating tightly coupled thermal and mechanical interactions. Die-to-die thermal crosstalk elevates HBM junction temperatures, while coefficient of thermal e... » read more

Multiphysics Fusion Technology for Multi-Die Designs Explained
By Synopsys - 27 May, 2026 - Comments: 0

Multiphysics issues are no longer a late-stage problem. Multi-die designs introduce tightly coupled electrical, thermal, electromagnetic, and electromechanical challenges that impact performance and reliability. This eBook shows why multiphysics analysis must move earlier in the design flow, and how a unified approach enables continuous validation from exploration through signoff. What You�... » read more

Process Variation In The Era Of Scaling: Improving Uniformity With Dummy Fill
By HJ Kim - 21 May, 2026 - Comments: 0

As semiconductor patterning continues to scale, even small layout nonuniformities can lead to noticeably different process outcomes. Real chip layouts contain a mix of dense regions, large open regions, and isolated features. As a result, the etch process encounters different “local environments” across the wafer. Even with the same process settings (or recipe), some areas may etch mo... » read more

The Emergence Of Electronics Digital Twins For Software-Defined Vehicles
By Marc Serughetti - 07 May, 2026 - Comments: 0

Digital twins have long played a critical role in engineering and manufacturing. As virtual representations of physical products, systems, and processes, they help organizations innovate faster, improve quality, and reduce costs. Early digital twin technologies were primarily rooted in the physical world, modeling mechanical systems such as engines, buildings, and factory operations to simulate... » read more

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