tag: NPU

The Future Of AI Compute Won’t Run On Just One Kind Of Chip
By Liz Allan - 19 Aug, 2026 - Comments: 0

Key Takeaways: Compute clusters bring different parallelization paradigms, such as Tensor parallel, data parallel, context parallel, and pipeline parallel, each with a different network topology requirement. Inference disaggregation means that one cluster has a specific set of hardware/software to do the pre-fill stage, another to do the decode stage, and another fully compute cluster t... » read more

Packet-Based NPUs In The LLM Era: From Compute-Bound CNNs To Memory-Bound Edge And Automotive Workloads
By Sharad Chole - 13 Aug, 2026 - Comments: 0

Many Semiconductor Engineering readers know the basic story behind Expedera’s Origin NPU IP architecture: packets instead of layers, higher MAC utilization, and less gratuitous movement of activations to external memory. What’s changing now is the workload mix. Vision-only edge processors are giving way to systems where LLMs, VLMs and generative features sit alongside traditional perception... » read more

Is Pergrammable A Word?
By Steve Roddy - 13 Aug, 2026 - Comments: 0

The price tag to invest in bespoke silicon for devices such as mobile phones, automobiles, laptops, or edge agentic token servers is enormous. Leading-edge SoCs can cost more than $200M to design, verify, and validate over a two-to-three-year development period. Semiconductor and systems companies making that level of investment want those new chips to have long production lifespans to deliver ... » read more

Scale Up, Scale Out Challenges Amplified For Clusters
By Liz Allan - 05 Aug, 2026 - Comments: 0

Key Takeaways: Software can identify the efficient way for clusters to use hardware such as GPUs, then optimize the output against the power consumption. The CPU is playing a larger role in the shift from AI training to inference. While this reduces GPU workloads, it places more pressure on memory speeds. Agentic AI workflows and a mixture of expert models are driving innovations a... » read more

Agentic AI Is Changing Data Center Architectures
By Ann Mutschler - 11 Jun, 2026 - Comments: 0

Key Takeaways: The rise of agentic AI is shifting data centers from GPU-centric number crunching to CPU-driven orchestration, where managing long-running reasoning loops and context is just as important as raw compute. Integrating CPUs, GPUs, and stacked memory into tightly coupled multi-die architectures with varying workloads makes it much harder to ensure they will be reliable and ef... » read more

A New Era For Co-Processing
By Brian Bailey - 09 Apr, 2026 - Comments: 0

Key Takeaways: There is no single processor capable of executing everything efficiently, meaning that multiple processors are required. Maximum efficiency is gained by minimizing the movement of data. Architects must maximize efficiency for today's workloads, while also adding enough flexibility to handle tomorrow's. New processor architectures are rapidly evolving thanks to... » read more

State Of The Market For Edge Silicon
By Ed Sperling - 08 Apr, 2026 - Comments: 0

The explosion of data and the rapid ramp of AI is causing significant changes in how chips are architected. At the edge, the key metrics are power, latency, and performance, but those can vary significantly by application and by workload. Steve Roddy, chief marketing officer at Quadric, talks about the need to balance performance and efficiency with flexibility for different applications, what ... » read more

Changes In Chip Architectures At The Edge
By Ed Sperling - 04 Feb, 2026 - Comments: 0

Edge computing is all about low latency, within a tight power budget, and with sufficient performance. This is very different from an AI data center, where the real focus is on data throughput between processor and memory. Achieving those goals requires a focus on what different processing elements bring to the table. Nigel Drego, co-founder and CTO of Quadric, talks about how these different c... » read more

Addressing Critical Tradeoffs In NPU Design
By Ann Mutschler - 21 Jan, 2026 - Comments: 1

Experts At The Table: AI/ML are driving a steep ramp in neural processing unit (NPU) design activity for everything from data centers to edge devices such as PCs and smartphones. Semiconductor Engineering sat down with Jason Lawley, director of product marketing, AI IP at Cadence; Sharad Chole, chief scientist and co-founder at Expedera; Steve Roddy, chief marketing officer at Quadric; Steven W... » read more

How And Why To Optimize NPUs
By Ann Mutschler - 15 Jan, 2026 - Comments: 0

Experts At The Table: AI/ML are driving a steep ramp in neural processing unit (NPU) design activity for everything from data centers to edge devices such as PCs and smartphones.  Semiconductor Engineering sat down with Jason Lawley, director of product marketing, AI IP at Cadence; Sharad Chole, chief scientist and co-founder at Expedera; Steve Roddy, chief marketing officer at Quadric; Steven... » read more

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