Special Reports

CFETs Forge Better Connections

By: Laura Peters

Performance advantage may come down to material choices and precise interconnect decisions.
Copper’s Grip On AI Scaling Is Starting To Slip

By: Bryon Moyer

As AI clusters push beyond rack-scale limits, optical interconnects and circuit switching are reshaping how data centers scale.
HBM Becomes Testbed For 3D Assembly Yield

By: Laura Peters

High-bandwidth memory has become a proving ground for 3D stack testing, DFT, and reliability.

 more »

Top Stories

How Will The Custom HBM Business Work?

There is no one-size-fits-all — yet.

Managing Thermal Expansion And Electromigration Through Interposer Design

New deep learning models may provide a pathway for modeling warpage.

The Future Of AI Compute Won’t Run On Just One Kind Of Chip

Power, token cost, interconnects, and software orchestration are pushing data centers t...

Semiconductor Earnings Roundup: Revenue, Growth and Takeaways

Company-by-company breakdown: Earnings across 80 semiconductor companies show AI-driven...

800VDC Pushes AI Power Design From Grid To Gate

The next power bottleneck is no longer just inside the accelerator — it is the full c...

The 1-Megawatt Rack Debate

Is it better to cram more compute into each rack or rethink the architecture?

Vertical Integration Becoming Pervasive

No system can be optimized without an understanding of both the hardware and software, ...

How Long Does A Measurement Remain Valid?

Measurements can be misleading after the chip, the test path, or the assumptions behind...

CPO Test Won’t Scale Without Standardization

Across the CPO ecosystem, profitability will not happen until standardization occurs.

As Space Gets Connected, Security Gets Critical

NASA is in the process of bringing terrestrial internet capabilities to astronauts, rov...

The Next Big Chip Failure May Be A Security One

Semiconductor leaders say hardware trust, verification, and lifecycle resilience must b...

Scale Up, Scale Out Challenges Amplified For Clusters

Compute clusters offer more processing capacity but at the cost of higher power. Softwa...

Self-Driving Cars Have An Aging Problem

AI workloads are pushing automotive sensors harder, forcing engineers to rethink how lo...

Compute Clusters Break Out Of National Labs To Scale AI

For compute-intensive applications, clusters of nodes that act as a single computer off...

Flat Enough? Warpage Management Gets Harder In Advanced Packaging

As packages get larger and thinner, warpage is becoming a process-control problem rathe...

Preparing For AI-Driven Chip Design And Verification

Jobs, markets, and economics are undergoing dramatic changes, but it's still too early ...

Untangling Chip Traffic Jams

Scaling NoCs across chiplets requires earlier validation of coherency, congestion, ther...

Designing Electro-Optical Chips

Photonics is forcing EDA to verify not just chips, but the physics of light inside full...

The Impact Of AI Automation On Chip Design

Change is coming, but how quickly depends on the availability of data and when chipmake...

From Highways To Health Care: Portability Proves Key To Physical AI

Success at the edge takes advantage of common threads — lithography, imaging, chiplet...

more top stories »

Latest News

Chip Industry Week In Review

New Micron lab; chip/AI price jump; multi-die monitoring; cryo links for quantum chips; interconnect RC bottleneck; 18A win; CPO roadmap; 2 new CEOs; humanoid rea...

Blog Review: Aug. 19

Memory tagging; digital twin of the Moon; packaging moves front-and-center; streaming sensor data.

Semiconductor Earnings Roundup: Revenue, Growth and Takeaways

Company-by-company breakdown: Earnings across 80 semiconductor companies show AI-driven demand extending well beyond the usual suspects.

more news »



Opinion

How Data Center AI Can Keep Growing, Despite Supply Chain Bottlenecks

Efficiency is key for the next two to five years. But what hap...

Invest In Junior Engineers

Instead of working out how to replace junior engineers with AI...

more opinions »



Research

Chip Industry Technical Paper Roundup: Aug. 18

2D CFET scaling; PIM chiplet voltage-droop control; advanced-n...

Research Bits: Aug. 18

Edge AI hardware/algorithm co-design; memtransistor with progr...

Chip Industry Technical Paper Roundup: Aug. 10

Ultrafast optical switching in doped semis; PIM simulation; fo...

more research »



Startup Corner

Startup Funding: Q2 2026

Plenty of cash for AI and its enablers; 80 startups raise over...

Startup Funding: Q1 2026

Massive rounds for AI, EDA, and manufacturing; 80 startups rai...

more startups »

Videos

AI Agent Orchestration For ASIC Autonomy


Verifying Networks On Chip


AI Models On The Edge


How Far Left Can You Shift?


Knowledge Centers / Entities, people and technologies explored