Vasanth Iyer

Oklahoma State University, Computer Science, Faculty Member

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Dr. Iyer received his Ph.D. in Computer Science from Florida International University (FIU), Miami advised by Dr. Sitharama Iyengar and Dr. Niki Pissinou. His research interests include sensor spatio-temporal analysis, and learning algorithms which use pre-processed data from data-cleaning tree’s similarity matrix, and efficient computation techniques using linear kernels. His academic experience includes Visiting Assistant Professor (2015) at Oklahoma State University, Postdoctoral Research Scientist (Air Force Research lab, 2014). Prior to defending his thesis at FIU, he was a Ph.D. candidate at International Institute of Information (IIIT-H), where he collaborated with CRC, CVIT and CSTAR research centers (2006-2012) and Institute of Infocomm Research (2007), Singapore and published over 17 research papers. He completed his MSCIS from UNH (1987), CT, and was embedded kernel intern between 1988-1990 working on Genesis Control Series. He joined UC Berkeley (extension) in 1992 and also worked as Software Design Engineer for 11 years (1991-2002) in the San Francisco Bay Area. Prior to becoming a graduate student, he completed B.Eng. in ECE (1985) followed by a Pre-PhD (2004) including the best paper in CSI-2005 both from Osmania University, India.
Supervisors: Dr. S.S. Iyengar , Dr. Niki Pissinou, Dr. C.V. Ramamurthy, and Dr. Sachin Shetty
Address: Miami, Florida, United States

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Papers by Vasanth Iyer

iTPM: Exploring PUF-based Keyless TPM for Security-by-Design of Smart Electronics

2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

Spatial Blockchain: Smart Contract Using Multiple Camera Censuses

Lecture notes in networks and systems, Oct 13, 2022

PUFchain 4.0: Integrating PUF-based TPM in Distributed Ledger for Security-by-Design of IoT

Proceedings of the Great Lakes Symposium on VLSI 2023

This work presents a sustainable cybersecurity solution using Physical Unclonable Functions (PUF)... more This work presents a sustainable cybersecurity solution using Physical Unclonable Functions (PUF), Trusted Platform Module (TPM), and Tangle Distributed Ledger Technology (DLT) for sustainable device and data security. Security-by-Design (SbD) or Hardware-Assisted Security (HAS) solutions have gained much prominence due to the requirement of tamper-proof storage for hardwareassisted cryptography solutions. Designing complex security mechanisms can impact their efficiency as IoT applications are more decentralized. In the proposed architecture, we presented a novel TPM-enabled PUF-based security mechanism with effective integration of PUF with TPM. The proposed mechanism is based on the process of sealing the PUF key in the TPM, which cannot be accessed outside the TPM and can only be unsealed by the TPM itself. A specified NV-index is assigned to each IoT node for sealing the PUF key to TPM using the Media Access Control (MAC) address. Access to the TPM's Non-Volatile Random Access Memory (NVRAM) is defined by the TPM's Enhanced Authorization policies as specified by the Trust Computing Group (TCG). The proposed architecture uses Tangle for sustainable data security and storage in decentralized IoT systems through a Masked Authentication Messaging (MAM) scheme for efficient and secure access control to Tangle. We validated the proposed approach through experimental analysis and implementation, which substantiates the potential of the presented PUFchain 4.0 for decentralized IoT-driven security solutions. CCS CONCEPTS • Security and privacy → Tamper-proof and tamper-resistant designs; Hardware-based security protocols; Distributed systems security.

Vasanth Iyer

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