Viterbi decoders are widely used in digital communication which dissipates huge quantity of power... more Viterbi decoders are widely used in digital communication which dissipates huge quantity of power. High speed and low power of system can be achieved by applying asynchronous technique to the digital system. In this work we have designed VD with 4-state, 1/2-code rate synchronous and asynchronous Viterbi decoder. Dynamic power can be lower by reducing switching activity and this is occurring due to designing VD from Hybrid Register Exchange Method. Soft decision decoding technique is being used since it can correct more number of errors than hard decision. Results shows that the implemented design using GALS gives 13.04% reduction in dynamic power consumption compared with its synchronous counterpart with improvement in maximum frequency by 52.71%. KeywordsViterbi Algorithm (VA), Viterbi decoder (VD), Branch Metric Unit (BMU), Add-CompareSelect (ACS), State Metric Unit (SMU), Hybrid Register Exchange Method (HREM). --------------------------------------------------------------------...
In this paper design of low power asynchronous Viterbi decoder for wireless applications is expos... more In this paper design of low power asynchronous Viterbi decoder for wireless applications is exposed. Algorithm based designed which uses bundle data (BD) protocol is implemented here for code rate 1/2 and constraint length 3. Four phase bundled data handshake protocol is used as a communication protocol to synchronize the data between different blocks of Viterbi decoder. From the obtained results it is observed that hybrid register exchange method is being outperforms than register exchange method as this helps to reduce the switching activity and hence the dynamic power. Proposed asynchronous Viterbi decoder using HRE method helps to reduce average dynamic power by 61.65% than its synchronous counterpart. Complete design is implemented in Xilinx 13.1 and its XPower analyzer tool is used to calculate the dynamic power. KeywordsAsynchronous Viterbi Decoder, four-phase, two-phase, Hybrid register exchange
Viterbi decoders are widely used in digital communication which dissipates huge quantity of power... more Viterbi decoders are widely used in digital communication which dissipates huge quantity of power. High speed and low power of system can be achieved by applying asynchronous technique to the digital system. In this work we have designed VD with 4-state, 1/2-code rate synchronous and asynchronous Viterbi decoder. Dynamic power can be lower by reducing switching activity and this is occurring due to designing VD from Hybrid Register Exchange Method. Soft decision decoding technique is being used since it can correct more number of errors than hard decision. Results shows that the implemented design using GALS gives 13.04% reduction in dynamic power consumption compared with its synchronous counterpart with improvement in maximum frequency by 52.71%. KeywordsViterbi Algorithm (VA), Viterbi decoder (VD), Branch Metric Unit (BMU), Add-CompareSelect (ACS), State Metric Unit (SMU), Hybrid Register Exchange Method (HREM). --------------------------------------------------------------------...
In this paper design of low power asynchronous Viterbi decoder for wireless applications is expos... more In this paper design of low power asynchronous Viterbi decoder for wireless applications is exposed. Algorithm based designed which uses bundle data (BD) protocol is implemented here for code rate 1/2 and constraint length 3. Four phase bundled data handshake protocol is used as a communication protocol to synchronize the data between different blocks of Viterbi decoder. From the obtained results it is observed that hybrid register exchange method is being outperforms than register exchange method as this helps to reduce the switching activity and hence the dynamic power. Proposed asynchronous Viterbi decoder using HRE method helps to reduce average dynamic power by 61.65% than its synchronous counterpart. Complete design is implemented in Xilinx 13.1 and its XPower analyzer tool is used to calculate the dynamic power. KeywordsAsynchronous Viterbi Decoder, four-phase, two-phase, Hybrid register exchange
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