Papers by Richard Halverson
Journal of the Association for Information Systems
To study the extent to which group development can reduce spreadsheet errors, an experiment compa... more To study the extent to which group development can reduce spreadsheet errors, an experiment compared error rates in spreadsheet development by subjects working alone (monads) and by subjects working in groups of three (triads). Impressively, triads made 78% fewer errors than monads. However, this was not as large a reduction as nominal group analysis suggests was possible. Members of triads were satisfied with group development. However, triads whose work went most smoothly, whose members were most satisfied with group interactions, and that had the loosest leadership structure were significantly more likely to make errors than other triads.
Programming the Hawaii Parallel Computer
Abstract A new application of field programmable gate-arrays is featured in the prototype of the ... more Abstract A new application of field programmable gate-arrays is featured in the prototype of the University of Hawaii parallel computer (HPC). User programs are compiled and then executed partly or completely in one or more field programmable gate-arrays (FPGAs). ...
Computer system and method using functional memory
Are Two Heads Better than One? (At Reducing Errors in Spreadsheet Modeling)
Office Systems Research Journal, 1997
EJ546828 - Are Two Heads Better than One? (At Reducing Errors in Spreadsheet Modeling).
Computers & Mathematics With Applications, 1999
In a previous paper [1], we described the solution of dynamic programming problems on a new class... more In a previous paper [1], we described the solution of dynamic programming problems on a new class of parallel processing systems, the Hawaii Parallel Computer (HPC). The HPC has a novel architecture distinguished by its incorporation of field programmable gate arrays to evaluate expressions and by its use of a decision-table data structure to represent computer programs. As specific examples, we showed how the HPC can be used to implement dynamic programming solutions of shortest-path and traveling-salesman problems. In that earlier implementation, we simply adapted algorithms intended for execution on conventional deterministic von Neumann computers. More recently, we designed a successor to the HPC, a “functional memory” computer, which includes constructs for nondeterministic computation. In this paper, we discuss how dynamic programming algorithms can be adapted to take advantage of this nondeterminism.
An Experiment In Collaborative Spreadsheet Development
Journal of The Ais, 2001
An FPGA-based minimal instruction set computer
… of Hawaii, technical report ICS-TR …, Jan 1, 1995
Abstract Memory mapped field programmable gate arrays (FPGAs) can be used to offload processor co... more Abstract Memory mapped field programmable gate arrays (FPGAs) can be used to offload processor computations in microprocessor-based systems. Multi-operand expressions can be computed in combinational logic eliminating computation cycles. When all ...
Studies of spreadsheet usage have revealed that spreadsheeting is very often a cooperative activi... more Studies of spreadsheet usage have revealed that spreadsheeting is very often a cooperative activity. How a group cooperates may be an important factor in its success at pooling domain and programming knowledge of the individual members to produce an error-free spreadsheet. This study compares individual and group spreadsheet development with an expected performance measure from Lorge and Solomon's model for groups solving eureka-type problems. It found evidence that same place-same time meetings may reduce a group's effectiveness suggesting that different place or different time interaction may be better for cooperative spreadsheet development.
Proc. ACM 2nd Intl. Workshop on FPGAs, Jan 1, 1994
A new application of field programmable gate-arrays is featured in the prototype of the Universit... more A new application of field programmable gate-arrays is featured in the prototype of the University of Hawaii parallel computer (HPC). User programs are compiled and then executed partly or completely in one or more field programmable gate-arrays (FPGAs). Some compile-for-FPGA systems have yet to effectively implement full high-level language loop constructs. In this paper we show how the conditional logic used for generating jump addresses can be consolidated into one jump address calculation and computed in a FPGA. In addition, we show how this coprocessing can be easily added to reduce the number of memory transactions and cycles it takes to execute a program. An overview of the HPC shared memory architecture is presented. A shortest path programming example begins by describing the steps for automatically generating the FPGA source code and concludes with the results of a load-store analysis comparing execution with and without the FPGA.
System Sciences, 1993, Proceeding of the …, Jan 1, 1993
This research examines which method is better for programming rule-based expert systems: IF-THEN ... more This research examines which method is better for programming rule-based expert systems: IF-THEN rules or decision tables. Thirty undergraduate MIS students served as experimental subjects in an eight week study. After four weeks, subjects wrote decision tables covering cases significantly more consistently than IF-THEN rules (p<.01). After eight weeks, however, subjects wrote IF-THEN rules that were significantly more complete (p<.05) and significantly more correct (p<.01). The eighth week test also revealed that subjects preferred decision tables to IF-THEN rules (p<.05), perceiving them to be easier (p<.01). It is interesting that in spite of a significant preference for decision tables, subjects wrote significantly more accurate IF-THEN rules.
Dynamic programming, decision tables, and the Hawaii parallel computer
Computers & Mathematics with Applications, Jan 1, 1994
Abstract The use of decision tables to express concurrent algorithms, and the use of concurrent p... more Abstract The use of decision tables to express concurrent algorithms, and the use of concurrent processors to execute decision table programs, are discussed. As a specific application, we show how dynamic programming algorithms can be implemented as ...
Microprocessors and Microsystems, Jan 1, 1995
Memory mapped field programmable gate arrays (FPGAs) can be used to add expression level parallel... more Memory mapped field programmable gate arrays (FPGAs) can be used to add expression level parallel processing to microprocessor-based systems. Multi-operand expressions can be computed in combinational logic eliminating microprocessor computation steps.
A FCCM for dataflow (spreadsheet) programs
FPGAs for Custom Computing …, Jan 1, 1995
Abstract We show how the University of Hawaii's field programmable gate array (FPGA) based cu... more Abstract We show how the University of Hawaii's field programmable gate array (FPGA) based custom machine (FCCM) can be used for dataflow programs expressed as spreadsheets. We also describe some nontrivial applications of this dataflow spreadsheet ...
Parallel Processing, 1994. ICPP 1994. …, Jan 1, 1994
Functional memory (FM) uses memory mapped reprogrammable field programmable gate arrays (FPGAs) f... more Functional memory (FM) uses memory mapped reprogrammable field programmable gate arrays (FPGAs) for fine-grained parallel processing. Multioperand expressions are computed in combinational logic eliminating processor computation steps. FPGAs capture operands as memory is written, eliminating separate processor load-stores to pass operands. This paper describes how program expressions can be implemented in FM, including branch address computations. It concludes with a load store analysis comparing a conventional von Neumann processor with and without FM for a shortest path program. The load store count stays about the same but eliminating the computation steps results in a onethird step reduction overall with FM. Processor FPGAs RAM Data Address M U X
Journal of the Association for …, Jan 1, 2001
To study the extent to which group development can reduce spreadsheet errors, an experiment compa... more To study the extent to which group development can reduce spreadsheet errors, an experiment compared error rates in spreadsheet development by subjects working alone (monads) and by subjects working in groups of three (triads).
Individual and group spreadsheet design: patterns of errors
System Sciences, 1994. …, Jan 1, 1994
Page 1. Individual and Group Spreadsheet Design: Patterns of Errors Raymond R. Panko University o... more Page 1. Individual and Group Spreadsheet Design: Patterns of Errors Raymond R. Panko University of Hawai'i Abstract Working alone or in groups of two (dyads) or fir (tetrads), undetgraduate business students developed a spreadsheet model. ...
Are Two Heads Better than One?(At Reducing Errors in Spreadsheet Modeling)
Office Systems Research Journal, Jan 1, 1997
EJ546828 - Are Two Heads Better than One? (At Reducing Errors in Spreadsheet Modeling).
System Sciences, 1996., …, Jan 1, 1996
Even the earliest writers in end user computing remarked on the potential dangers of end user spr... more Even the earliest writers in end user computing remarked on the potential dangers of end user spreadsheet development. Until recently, there was only anecdotal evidence to support their concerns. Now, there is considerable evidence>om experiments, field audits, and surveys of end users and organizations that early concerns were well-founded This paper presents a framework for risks in spreadsheeting and organizes selected research findings in terms of this framework.
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Papers by Richard Halverson