A blog by John Wickerson
Ilan Iwumbwe and Benny Liu did undergraduate research placements with me this summer, and I'm very pleased that they will be presenting their work at the Programming Languages for Quantum Computing (PLanQC) workshop at POPL next month. Ilan and Benny built a tool called QuteFuzz that randomly generates descriptions of quantum circuits. The idea is… Continue reading Fuzzing Quantum Compilers
I wrote earlier this year about my attempt to understand the repercussions of toggling $latex \subseteq$ and $latex \supseteq$ when giving a semantics to Hoare triples. In response to that post, Yann Herklotz helpfully pointed me to Patrick Cousot's POPL 2024 paper [10], which does all this and a lot more besides. In particular, Cousot's… Continue reading The Hoare Cube
I'm delighted that Quentin Corradi, a PhD student I jointly supervise with George Constantinides, will be presenting his work to improve the reliability of hardware design tools next week at the FUZZING'24 workshop, a satellite event of the ISSTA conference. The Verilog language is widely used in hardware design, and is accepted by a multitude… Continue reading Automated feature testing of Verilog parsers using fuzzing
I'm delighted that Luke Geeson’s work on "mix testing" (a collaboration with James Brotherston, Wilco Dijkstra, Alastair Donaldson, Lee Smith, Tyler Sorensen, and myself) will appear at OOPSLA 2024 in October. There has been quite a lot of work on "litmus testing" of compilers in the last couple of decades. This mainly takes the form of… Continue reading Mix-testing: revealing a new class of compiler bugs
The Hoare triple $latex \{P\}\,c\,\{Q\}$ has a very simple meaning, namely: $latex \forall\sigma, \sigma'\ldotp \sigma \in P \wedge (\sigma,\sigma') \in c \longrightarrow \sigma'\in Q$. That is: if the precondition $latex P$ is satisfied in some state $latex \sigma$, and $latex c$ can transform $latex \sigma$ into $latex \sigma'$, then $latex \sigma'$ must satisfy the postcondition… Continue reading What is the other Incorrectness logic?
This post is about a paper by Yann Herklotz, James Pollard, Nadesh Ramanathan, and myself that will be presented shortly at OOPSLA 2021. High-level synthesis (HLS) is an increasingly popular way to design hardware. It appeals to software developers because it allows them to exploit the performance and energy-efficiency of custom hardware without having to learn… Continue reading High-level synthesis, but correct
If you've ever attended a seminar about weak memory models, chances are good that you've been shown a small concurrent program and asked to ponder what is allowed to happen if its threads are executed on two or three different cores of a multicore CPU. For instance, you might be shown this program: // Thread… Continue reading Understanding the memory semantics of multi-threaded CPU/FPGA programs
This post is about a paper by Matt Windsor, Ally Donaldson, and myself that will be presented shortly at the ACM SIGSOFT International Symposium on Software Testing and Analysis (ISSTA) conference, in the tool demonstrations track. Compilers are a central pillar of our computing infrastructure, so it's really important that they work correctly. There's been… Continue reading Introducing C4: the C Compiler Concurrency Checker
High-level synthesis – the automatic compilation of a software program into a custom hardware design – is an increasingly important technology. It's attractive because it lets software engineers harness the computational power and energy-efficiency of custom hardware devices such as FPGAs. It's also attractive to hardware designers because it allows them to enter their designs… Continue reading Fuzzing High-Level Synthesis Tools
T-diagrams (or tombstone diagrams) are widely used by teachers to explain how compilers and interpreters can be composed together to build and execute software. In this blog post, Paul Brunet and I revisit these diagrams, and show how they can be redesigned for better readability. We demonstrate how they can be applied to explain compiler… Continue reading Diagrams for Composing Compilers
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