A blog by John Wickerson
Ilan Iwumbwe and Benny Liu did undergraduate research placements with me this summer, and I'm very pleased that they will be presenting their work at the Programming Languages for Quantum Computing (PLanQC) workshop at POPL next month. Ilan and Benny built a tool called QuteFuzz that randomly generates descriptions of quantum circuits. The idea is… Continue reading Fuzzing Quantum Compilers
I'm delighted that Luke Geeson’s work on "mix testing" (a collaboration with James Brotherston, Wilco Dijkstra, Alastair Donaldson, Lee Smith, Tyler Sorensen, and myself) will appear at OOPSLA 2024 in October. There has been quite a lot of work on "litmus testing" of compilers in the last couple of decades. This mainly takes the form of… Continue reading Mix-testing: revealing a new class of compiler bugs
Yann Herklotz has added hyperblock scheduling to his verified high-level synthesis (HLS) tool called Vericert, and I'm very pleased that our paper about this work has been accepted to appear at PLDI 2024 this June. This paper was our "difficult second album", in the sense that we'd already published a paper about the first version… Continue reading Verified high-level synthesis – now with hyperblocks!
The world of computer architecture is quite excited these days about something called Compute Express Link (CXL). It's a new standard that allows the various components of a datacentre computer to communicate large amounts of data efficiently with each other. In this article, I'll explain what CXL is, and why there is so much excitement… Continue reading CXL: What’s all the fuss about?
If you've ever attended a seminar about weak memory models, chances are good that you've been shown a small concurrent program and asked to ponder what is allowed to happen if its threads are executed on two or three different cores of a multicore CPU. For instance, you might be shown this program: // Thread… Continue reading Understanding the memory semantics of multi-threaded CPU/FPGA programs
A huge number of academic papers, particularly in the fields of computer systems/architecture, use some sort of block diagram to give readers an overview of the solution being presented. For instance, about two thirds of the papers presented this year at ASPLOS contained at least one of these diagrams, usually towards the start of the paper.… Continue reading How to draw block diagrams
I had a great time at PLDI 2018 last week. Here is my take on a few of the papers that stood out for me. John Vilk presented a tool called BLeak for finding memory leaks in web browsers. One might think that leak detection is not important in a garbage-collected setting, but Vilk explained… Continue reading Greatest hits of PLDI 2018
What follows is a summary of the main contributions of a paper I wrote with Nathan Chong and Tyler Sorensen for the PLDI 2018 conference. This project studies two features of a modern computer, one called out-of-order execution and one called transactional memory. Out-of-order execution is where a computer chooses, for performance reasons, to perform its instructions in an order… Continue reading What do you get if you cross Weak Memory with Transactional Memory?
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