| FPGA Mezzanine Connector (FMC) |
VITA 57.1 FMC HSPC Connector |
| High Speed Loopback |
TX to RX loopbacks on the multi-gigabit data pairs DP0 to DP9 up to 25Gbps |
| IO Loopback |
Loopback of LA Bank [33:0], HA Bank [23:0] and HB Bank [21:0] |
| Clock |
156.25MHz Gigabit transceiver reference clock |
| Storage |
32Kb-EEPROM for VITA57.1 Configuration storage |
| General Features |
- Power Connector: 12V, 3.3V, VADJ from FMC HPC Connector
- Power Status: LED Indicators for Powers and power good
- Form Factor: VITA 57.1 Single Width (78.5mm x 69mm)
- Compliance:
- RoHS Compliant
- REACH Compliant
|
